207472 ⎘
Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof; Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof; Manufacture of specific parts of devices defined in group; Making of isolation regions between components; Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using lateral overgrowth techniques, i.e. ELO techniques
METHOD FOR PREPARING A CARRIER SUBSTRATE PROVIDED WITH A CHARGE-TRAPPING LAYER
#2METHOD FOR MANUFACTURING SILICON SUBSTRATE FOR QUANTUM COMPUTER, SILICON SUBSTRATE FOR QUANTUM COMPUTER, AND SEMICONDUCTOR APPARATUS
#3Silicon-On-Oxide-On-Silicon
#4METHOD FOR FABRICATING GERMANIUM/SILICON ON INSULATOR IN RADIO FREQUENCY SPUTTER SYSTEM
#5Epitaxially fabricated heterojunction bipolar transistors
#6Oxidized cavity structures within and under semiconductor devices
#7Devices with backside metal structures and methods of formation thereof
#8Method for producing a semiconductor chip and semiconductor chip
#9Isolated semiconductor layer in bulk wafer by localized silicon epitaxial seed formation
#10Devices with backside metal structures and methods of formation thereof
#11Gallium nitride (GaN) transistor structures on a substrate
#12Semiconductor structure
#13Buried insulator regions and methods of formation thereof
#14Method of wafer thinning and realizing backside metal structures
#15Devices with backside metal structures and methods of formation thereof
#16Method for producing a semiconductor chip and semiconductor chip
#17Semiconductor structure and fabrication method thereof
#18Making a defect free fin based device in lateral epitaxy overgrowth region
#19Substrates with buried isolation layers and methods of formation thereof
#20Forming zig-zag trench structure to prevent aspect ratio trapping defect escape
#21Dielectric isolated SiGe fin on bulk substrate
#22SOI substrate manufacturing method and SOI substrate
#23Semiconductor device with buried cavities and dielectric support structures
#24Method of manufacturing semiconductor device and semiconductor device
#25Isolated semiconductor layer in bulk wafer by localized silicon epitaxial seed formation
#26Method of forming a semiconductor substrate with buried cavities and dielectric support structures
#27Isolated semiconductor layer in bulk wafer by localized silicon epitaxial seed formation
#28P-FET WITH GRADED SILICON-GERMANIUM CHANNEL
#29Semiconductor body with a buried material layer and method
#30Semiconductor body with a buried material layer and method
#31Method of manufacturing semiconductor device and semiconductor device
#32SEMICONDUCTOR BODY WITH A BURIED MATERIAL LAYER
#33Semiconductor-on-insulator (SOI) structure and method of forming the SOI structure using a bulk semiconductor starting wafer
#34IIIONon single crystal SOI substrate and III n growth platform
#35Semiconductor-on-insulator (SOI) structure and method of forming the SOI structure using a bulk semiconductor starting wafer
#36SEMICONDUCTOR BODY WITH A BURIED MATERIAL LAYER AND METHOD
#37Method for manufacturing a semiconductor device having trenches defined in the substrate surface
#38Semiconductor array and method for manufacturing a semiconductor array
#39Epitaxial SiObarrier/insulation layer
#40Method for epitaxial growth of a gallium nitride film separated from its substrate
#41Silicon island structure and method of fabricating same