MANUFACTURING METHOD FOR SEMICONDUCTOR STRUCTURE

MANUFACTURING METHOD FOR HYBRID SOI SUBSTRATE

INCREASING Q-TIME

INTEGRATED CIRCUIT STRUCTURE WITH BACKSIDE DIELECTRIC LAYER HAVING AIR GAP

FORMATION OF SINGLE CRYSTAL SEMICONDUCTORS USING PLANAR VAPOR LIQUID SOLID EPITAXY

DEVICE WITH ELECTRICAL COMPONENT FORMED OVER A CAVITY AND METHOD THEREFOR

Method Of Forming Backside Power Rails

METHOD FOR FABRICATING SEMICONDUCTOR DEVICE

MANUFACTURING METHOD FOR HYBRID SOI SUBSTRATE

SEMICONDUCTOR STRUCTURE

STRUCTURE OF HIGH-RESISTIVITY SILICON-ON-INSULATOR EMBEDDED WITH CHARGE CAPTURE LAYER AND MANUFACTURE THEREOF

SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF

METHODS FOR MAKING SEMICONDUCTOR DEVICES INCLUDING LOCALIZED SEMICONDUCTOR-ON-INSULATOR (SOI) REGIONS

SEMICONDUCTOR ON INSULATOR WAFER WITH CAVITY STRUCTURES

Methods of Forming Material Within Openings Extending into a Semiconductor Construction, and Semiconductor Constructions Having Fluorocarbon Material

STRAINED SEMICONDUCTOR USING ELASTIC EDGE RELAXATION OF A STRESSOR COMBINED WITH BURIED INSULATING LAYER

ISOLATION STRUCTURES IN MULTI-GATE SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME

Integrated circuit structure with backside dielectric layer having air gap

COMPLEMENTARY FIELD-EFFECT TRANSISTOR DEVICE INCLUDING AT LEAST ONE FIN

BULK SEMICONDUCTOR SUBSTRATE WITH FULLY ISOLATED SINGLE-CRYSTALLINE SILICON ISLANDS AND THE METHOD FOR FORMING THE SAME

Formation of single crystal semiconductors using planar vapor liquid solid epitaxy

SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF

Method of forming backside power rails

Method of manufacturing semiconductor device

Bulk Nanosheet with Dielectric Isolation

Semiconductor device

METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE AND SEMICONDUCTOR SUBSTRATE

Method for manufacturing isolation structure of hybrid epitaxial area and active area in FDSOI

Semiconductor structure with shared well

SEMICONDUCTOR-ON-INSULATOR DEVICE WITH LIGHTLY DOPED EXTENSION REGION

Semiconductor devices and methods of manufacturing thereof

Semiconductor device including element isolation film and method for fabricating the same

Strained semiconductor using elastic edge relaxation of a stressor combined with buried insulating layer

Silicon-on-insulator with crystalline silicon oxide

Wafer scale bonded active photonics interposer

ISOLATION STRUCTURES IN MULTI-GATE SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME

Isolation structures in multi-gate semiconductor devices and methods of fabricating the same

SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME

Integrated circuit structure with backside dielectric layer having air gap

Optical detection element and GOI device for ultra-small on-chip optical sensing, and manufacturing method of the same

Gap spacer for backside contact structure

Multiple thickness semiconductor-on-insulator field effect transistors and methods of forming the same

Method of forming backside power rails

Silicon on insulator structure and method of making the same

Method for manufacturing a polysilicon SOI substrate including a cavity

Gap spacer for backside contact structure

Formation of single crystal semiconductors using planar vapor liquid solid epitaxy

Integrated circuit structures with well boundary distal to substrate midpoint and methods to form the same

Semiconductor on insulator wafer with cavity structures

Method of manufacturing semiconductor device

Method for fabricating semiconductor device

Multi-layered polysilicon and oxygen-doped polysilicon design for RF SOI trap-rich poly layer

Vertically stacked field effect transistors

Semiconductor device

Multiple thickness semiconductor-on-insulator field effect transistors and methods of forming the same

Integrated circuit structure with backside dielectric layer having air gap

Integrated structure and manufacturing method thereof

VERTICALLY STACKED FIN SEMICONDUCTOR DEVICES

Isolation structures in multi-gate semiconductor devices and methods of fabricating the same

IC products formed on a substrate having localized regions of high resistivity and methods of making such IC products

Method for forming an electrical contact between a semiconductor film and a bulk handle wafer, and resulting structure

Methods of forming material within openings extending into a semiconductor construction, and semiconductor constructions having fluorocarbon material

Strained semiconductor using elastic edge relaxation of a stressor combined with buried insulating layer

Method for manufacturing a CFET device

Semiconductor device and method of manufacturing the same

Formation of single crystal semiconductors using planar vapor liquid solid epitaxy

Monolithic multi-bit weight cell for neuromorphic computing

Vertically stacked field effect transistors

Multi-layered polysilicon and oxygen-doped polysilicon design for RF SOI trap-rich poly layer

Semiconductor device and method for producing semiconductor device

Method of forming and transferring thin film using SOI wafer and heat treatment process

Vertically stacked fin semiconductor devices

Semiconductor device and method for fabricating the same

Wafer scale bonded active photonics interposer

Co-integration of bulk and SOI transistors

Bonded assembly including a semiconductor-on-insulator die and methods for making the same

Mode converter and method of fabricating thereof

Simplified memory cells based on fully-depleted silicon-on-insulator transistors

Semiconductor device and fabrication method thereof

Fin structures with bottom dielectric isolation

Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication

SEMICONDUCTOR DEVICES AND METHODS FOR FABRICATING THE SAME

Device forming method

Strained semiconductor using elastic edge relaxation of a stressor combined with buried insulating layer

Nonvolatile memory device having a memory-transistor gate-electrode provided with a charge-trapping gate-dielectric layer and two sidewall select-transistor gate-electrodes

Isolation cavities in semiconductor devices

Managed substrate effects for stabilized SOI FETs

Radio-frequency isolation using backside cavities

Multi-state device based on ion trapping

Silicon-on-insulator with crystalline silicon oxide

METHOD OF FORMING AN RF SILICON ON INSULATOR DEVICE

Fully depleted semiconductor-on-insulator transistors with different buried dielectric layer charges and different threshold voltages

Nanosheet FET with box isolation on substrate

Fully depleted semiconductor-on-insulator transistors with different buried dielectric layer charges and different threshold voltages

Deep fence isolation for logic cells

SOI substrate, semiconductor device and method for manufacturing the same

System and method for a transducer in an EWLB package

Field-effect transistors with a grown silicon-germanium channel

Backside reinforcement structure design for mirror flatness

Porous silicon relaxation medium for dislocation free CMOS devices

Integrated circuit heat dissipation using nanostructures

SiC-SOI device and manufacturing method thereof

Manufacturing method of semiconductor device

Integrated circuit heat dissipation using nanostructures

Laminated body and semiconductor device

Semiconductor-on-insulator finFET devices with high thermal conductivity dielectrics

Inverted T channel field effect transistor (ITFET) including a superlattice

Method for making an inverted T channel field effect transistor (ITFET) including a superlattice

Sealed cavity structures with non-planar surface features to induce stress

Bulk nanosheet with dielectric isolation

Transistor with gate extension to limit second gate effect

Composite semiconductor substrate, semiconductor device and method for manufacturing the same

Heterostructure system and method of fabricating the same

Fully-depleted CMOS transistors with u-shaped channel

SILICON GERMANIUM-ON-INSULATOR FORMATION BY THERMAL MIXING

RF switch on high resistive substrate

Integrated structure and manufacturing method thereof

Method of manufacturing semiconductor apparatus

Method for forming an electrical contact between a semiconductor film and a bulk handle wafer, and resulting structure

Mode converter and method of fabricating thereof

Methods of fabricating silicon-on-insulator (SOI) semiconductor devices using blanket fusion bonding

Manufacture of group IIIA-nitride layers on semiconductor on insulator structures

Radio-frequency isolation cavities and cavity formation

Topside radio-frequency isolation cavity configuration

Pillar-shaped semiconductor device and method for producing the same

Integrated circuit with metal gate having dielectric portion over isolation area

Battery structure with stable voltage for neuromorphic computing

Multi-state device based on ion trapping

System and method for a transducer in an eWLB package

SOI substrate, semiconductor device and method for manufacturing the same

Polycrystalline ceramic substrate, bonding-layer-including polycrystalline ceramic substrate, and laminated substrate

Radio-frequency isolation using porous silicon

Porous silicon relaxation medium for dislocation free CMOS devices

Semiconductor devices, and a method for forming a semiconductor device

Semiconductor device and manufacturing method thereof

Carrier for a semiconductor structure

Co-integration of bulk and SOI transistors

Managed substrate effects for stabilized SOI FETs

Semiconductor device

Method for manufacturing electronic device

Techniques and structure for forming thin silicon-on-insulator materials

Semiconductor constructions having fluorocarbon material

Growing Groups III-V lateral nanowire channels

Strained semiconductor using elastic edge relaxation of a stressor combined with buried insulating layer

Shallow trench isolation formation without planarization

Managed substrate effects for stabilized SOI FETs

Wide band gap transistors on non-native semiconductor substrates

Integrated circuit heat dissipation using nanostructures

Semiconductor structure and fabrication method thereof

Method of making a CMOS semiconductor device using a stressed silicon-on-insulator (SOI) wafer

Backside substrate openings in transistor devices

Integrated circuit heat dissipation using nanostructures

Method for reducing threading dislocation of semiconductor device

METAL OXIDE SEMICONDUCTOR (MOS) ISOLATION SCHEMES WITH CONTINUOUS ACTIVE AREAS SEPARATED BY DUMMY GATES AND RELATED METHODS

Semiconductor device with low band-to-band tunneling

Structure and method to form defect free high-mobility semiconductor fins on insulator

Switch element and load driving device

Strain retention semiconductor member for channel SiGe layer of pFET

Semiconductor structure

Method for manufacture of a semiconductor wafer suitable for the manufacture of an SOI substrate, and SOI substrate wafer thus obtained

Method of fabricating diamond-semiconductor composite substrates

Porous silicon relaxation medium for dislocation free CMOS devices

Porous silicon relaxation medium for dislocation free CMOS devices

Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication

Cavity formation in backside interface layer for radio-frequency isolation

Thermal treatment system with collector device

Fully-depleted CMOS transistors with U-shaped channel

Lateral insulated-gate bipolar transistor and manufacturing method therefor

Bridging local semiconductor interconnects

Semiconductor device and fabrication method thereof

On-chip DC-DC power converters with fully integrated GaN power switches, silicon CMOS transistors and magnetic inductors

Semiconductor device and FinFET transistor

Device layer transfer with a preserved handle wafer section

Manufacture of Group IIIA-nitride layers on semiconductor on insulator structures

SEMICONDUCTOR WAFER AND METHOD FOR MANUFACTURING THE SAME

Methods of fabricating silicon-on-insulator (SOI) semiconductor devices using blanket fusion bonding

Method, apparatus and system for back gate biasing for FD-SOI devices

SOI WAFERS AND DEVICES WITH BURIED STRESSOR

Semiconductor film with adhesion layer and method for forming the same

Bulk nanosheet with dielectric isolation

Bulk nanosheet with dielectric isolation

Structure and method to form defect free high-mobility semiconductor fins on insulator

Method for forming an electrical contact between a semiconductor film and a bulk handle wafer, and resulting structure

Devices and methods for dynamically tunable biasing to backplates and wells

Silicon on nothing devices and methods of formation thereof

System and method for a transducer in an eWLB package

Method of manufacturing silicon on insulator substrate

Semiconductor device including a recessed insulation region and fabrication method thereof

Front-Side Imager Having a Reduced Dark Current on a SOI Substrate

Silicon-on-plastic semiconductor device with interfacial adhesion layer

Semiconductor devices with cavities

Semiconductor structure and fabrication method thereof

Wide band gap transistor on non-native semiconductor substrate

Growing groups III-V lateral nanowire channels

Semiconductor device and method of manufacturing the same

RF switch on high resistive substrate

Process for smoothing the surface of a structure

Partially dielectric isolated fin-shaped field effect transistor (FinFET)

Semiconductor device and manufacturing method thereof

Method for producing one-time-programmable memory cells and corresponding integrated circuit

Radio-frequency isolation using front side opening

Method for manufacture of a semiconductor wafer suitable for the manufacture of an SOI substrate, and SOI substrate wafer thus obtained

Semiconductor structure and the manufacturing method thereof

Structure for radiofrequency applications and process for manufacturing such a structure

Backside coupled symmetric varactor structure

Porous silicon relaxation medium for dislocation free CMOS devices

Porous silicon relaxation medium for dislocation free CMOS devices

MOS transistor and method of manufacturing the same

Method for dissolving a silicon dioxide layer

Fin-shaped structure

Electronic device and method for manufacturing the same

Growing groups III-V lateral nanowire channels

Semiconductor Device With Self-Aligned Back Side Features

Conversion of strain-inducing buffer to electrical insulator

Bridging local semiconductor interconnects

Process for manufacturing a plurality of structures

Electronic device with hollowed-out rear plate

Silicon germanium-on-insulator formation by thermal mixing

Silicon germanium fin

METHOD OF FORMING FIN-SHAPED STRUCTURE

SILICON GERMANIUM-ON-INSULATOR FORMATION BY THERMAL MIXING

Semiconductor device, FinFET transistor and fabrication method thereof

Silicon germanium-on-insulator formation by thermal mixing

Radio frequency isolation using substrate opening

Radio frequency isolation cavity formation using sacrificial material

Channel SiGe devices with multiple threshold voltages on hybrid oriented substrates, and methods of manufacturing same

Substrate opening formation in semiconductor devices

Calibration method for heat treatment units

Method for fabricating an improved field effect device

Strained semiconductor using elastic edge relaxation of a stressor combined with buried insulating layer

Programmable active cooling device

SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE

Efficient buried oxide layer interconnect scheme

Method of making a CMOS semiconductor device using a stressed silicon-on-insulator (SOI) wafer

Semiconductor device with low band-to-band tunneling

Multiple threshold voltage trigate devices using 3D condensation

Integrated circuit heat dissipation using nanostructures

Integrated circuit heat dissipation using nanostructures

FET device having a vertical channel in a 2D material layer

SOI based FINFET with strained source-drain regions

Semiconductor device and method for manufacturing the same

3D material modification for advanced processing

THRESHOLD VOLTAGE ADJUSTMENT IN METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR WITH SILICON OXYNITRIDE POLYSILICON GATE STACK ON FULLY DEPLETED SILICON-ON-INSULATOR

Integrated circuit heat dissipation using nanostructures

Front-side imager having a reduced dark current on SOI substrate

Dual three-dimensional and RF semiconductor devices using local SOI

Transfer printing method

Dual gate FD-SOI transistor

Semiconductor film with adhesion layer and method for forming the same

Fin-shaped structure and method thereof

Mechanisms for forming radio frequency (RF) area of integrated circuit structure

High voltage metal oxide semiconductor field effect transistor integrated into extremely thin semiconductor on insulator process

Method of making embedded memory device with silicon-on-insulator substrate

Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication

Boron rich nitride cap for total ionizing dose mitigation in SOI devices

Method for dissolving a silicon dioxide layer

Method of making a transistor

RF switch on high resistive substrate

Handle substrates of composite substrates for semiconductors

Three dimensional semiconductor device having lateral channel

P-FET with graded silicon-germanium channel

BACK BIASED TRANSISTOR AND CURRENT SOURCE BIASING

Silicon on nothing devices and methods of formation thereof

Process for fabricating a semiconductor-on-insulator substrate

Channel SiGe devices with multiple threshold voltages on hybrid oriented substrates, and methods of manufacturing same

Method for coupling a graphene layer and a substrate and device comprising the graphene/substrate structure obtained

Substrate arrangement

High voltage metal oxide semiconductor field effect transistor integrated into extremely thin semiconductor on insulator process

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE

Strain engineering in back end of the line

Flexible, stretchable electronic devices

Semiconductor-on-insulator structure and method of fabricating the same

Semiconductor-on-insulator with back side support layer

Silicon germanium-on-insulator formation by thermal mixing

Semiconductor structure and method of forming a harmonic-effect-suppression structure

Method of making a CMOS semiconductor device using a stressed silicon-on-insulator (SOI) wafer

Semiconductor device and method for forming the same

Silicon-on-nothing FinFETs

Semiconductor body with a buried material layer and method

Defective P-N junction for backgated fully depleted silicon on insulator mosfet

Method for producing a strained semiconductor on insulator substrate

RF SOI switch with backside cavity and the method to form it

Mechanisms for forming semiconductor device structure with floating spacer

DUAL GATE FD-SOI TRANSISTOR

Bridging local semiconductor interconnects

Field effect transistor including a regrown contoured channel

Mechanisms for forming radio frequency (RF) area of integrated circuit structure

Semiconductor film with adhesion layer and method for forming the same

Semiconductor-on-insulator structure and method of fabricating the same

Method of making a CMOS semiconductor device using a stressed silicon-on-insulator (SOI) wafer

Methods of forming semiconductor patterns including reduced dislocation defects and devices formed using such methods

Heat dissipative electrical isolation/insulation structure for semiconductor devices and method of making

Semiconductor structure and the manufacturing method thereof

METHOD FOR SEPARATION BETWEEN AN ACTIVE ZONE OF A SUBSTRATE AND ITS BACK FACE OR A PORTION OF ITS BACK FACE

Passive devices for FinFET integrated circuit technologies

Process for thinning the active silicon layer of a substrate of “silicon on insulator” (SOI) type

Semiconductor structure and method of forming a harmonic-effect-suppression structure

STRUCTURE AND METHOD OF HIGH-PERFORMANCE EXTREMELY THIN SILICON ON INSULATOR COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR TRANSISTORS WITH DUAL STRESS BURIED INSULATORS

Selective amorphization for signal isolation and linearity

Controlled process and resulting device