CMOS compatible BioFET

Thin semiconductor-on-insulator MOSFET with co-integrated silicon, silicon germanium and silicon doped with carbon channels

THIN SEMICONDUCTOR-ON-INSULATOR MOSFET WITH CO-INTEGRATED SILICON, SILICON GERMANIUM AND SILICON DOPED WITH CARBON CHANNELS

Post-gate shallow trench isolation structure formation

Reducing performance variation of narrow channel devices

Method for fabrication of a semiconductor device and structure

Shallow trench isolation structure having a nitride plug

Carbon implant for workfunction adjustment in replacement gate transistor

MOSFET formed on an SOI wafer with a back gate

Carbon implant for workfunction adjustment in replacement gate transistor

Semiconductor device and method for manufacturing semiconductor device

Integrated circuit using FDSOI technology, with well sharing and means for biasing oppositely doped ground planes present in a same well

Semiconductor device

Electric charge flow circuit for a time measurement

Semiconductor integrated circuit device and manufacturing method for semiconductor integrated circuit device

Restricted stress regions formed in the contact level of a semiconductor device

Silicon-on-insulator chip having multiple crystal orientations

Structure and method to form passive devices in ETSOI process flow

Enhancement of charge carrier mobility in transistors

Enhancement of charge carrier mobility in transistors

Method and structure having monolithic heterogeneous integration of compound semiconductors with elemental semiconductor

Method of controlled lateral etching

Preparation method for full-isolated SOI with hybrid crystal orientations

Method for producing semiconductor device and semiconductor device having pillar-shaped semiconductor

SOI integrated circuit comprising adjacent cells of different types

SOI Semiconductor Structure with a Hybrid of Coplanar Germanium and III-V, and Preparation Method thereof

Self-aligned bottom plate for metal high-K dielectric metal insulator metal (MIM) embedded dynamic random access memory

Manufacturing method of oxide semiconductor device

METHOD FOR RADIATION HARDENING AN INTEGRATED CIRCUIT

Non-volatile latch circuit and logic circuit, and semiconductor device using the same

Method of producing a three-dimensional integrated circuit

Methods of forming an anode and a cathode of a substrate diode by performing angled ion implantation processes

Semiconductor device with work function adjusting layer having varied thickness in a gate width direction and methods of making same

On-chip radiation dosimeter

Semiconductor device with a common back gate isolation region and method for manufacturing the same

Semiconductor device with back gate isolation regions and method for manufacturing the same

MOSFET including asymmetric source and drain regions

Integrated circuits that include deep trench capacitors and methods for their fabrication

Semiconductor device and method for manufacturing semiconductor device

Isolation region fabrication for replacement gate processing

Raised source/drain field effect transistor

High linearity hybrid transistor device

Annealing copper interconnects

Antenna switch modules and methods of making the same

Trap rich layer with through-silicon-vias in semiconductor devices

METHOD OF PROTECTING DEEP TRENCH SIDEWALL FROM PROCESS DAMAGE

Trench capacitor with spacer-less fabrication process

Method of fabricating high-mobility dual channel material based on SOI substrate

Reduction of STI corner defects during SPE in semiconductor device fabrication using DSB substrate and hot technology

THRESHOLD ADJUSTMENT OF TRANSISTORS BY CONTROLLED S/D UNDERLAP

Borderless contact for ultra-thin body devices

Circuit structures, memory circuitry, and methods

Hybrid CMOS technology with nanowire devices and double gated planar devices

Hybrid CMOS technology with nanowire devices and double gated planar devices

Fiber SOI substrate, semiconductor device using this, and manufacturing method thereof

Semiconductor device and structure

Semiconductor system and device

Semiconductor device having well regions with opposite conductivity

Electronic devices and systems, and methods for making and using the same

Electronic devices and systems, and methods for making and using the same

Shift register memory and method of manufacturing the same

Semiconductor device and method for making same

SOI CMOS STRUCTURE HAVING PROGRAMMABLE FLOATING BACKPLATE

Semiconductor device having a trench isolation structure

CMOS with dual raised source and drain for NMOS and PMOS

FET eDRAM trench self-aligned to buried strap

TSV STRUCTURE AND METHOD FOR FORMING THE SAME

Methodology for fabricating isotropically recessed source and drain regions of CMOS transistors

Methods of forming memory arrays and semiconductor constructions

Switching system and method

Structure and method for forming isolation and buried plate for trench capacitor

Semiconductor device

Schottky-clamped bipolar transistor with reduced self heating

Semiconductor devices with low junction capacitances

Semiconductor-on-insulator substrate and structure including multiple order radio frequency harmonic suppressing region

Method and structure for integrating capacitor-less memory cell with logic

Semiconductor structures and devices and methods of forming the same

Method and structure for low resistive source and drain regions in a replacement metal gate process flow

Vertical stacking of field effect transistor structures for logic gates

Semiconductor structures including bodies of semiconductor material, devices including such structures and related methods

INTEGRATION OF VERTICAL BJT OR HBT INTO SOI TECHNOLOGY

Raised Source/Drain Field Effect Transistor

Nanowire field effect transistors

Buried metal-semiconductor alloy layers and structures and methods for fabrication thereof

Semiconductor devices with active semiconductor height variation

SILICON ON INSULATOR COMPLEMENTARY METAL OXIDE SEMICONDUCTOR WITH AN ISOLATION FORMED AT LOW TEMPERATURE

Semiconductor structure and method for manufacturing the same

Deposition on a nanowire using atomic layer deposition

Method for forming SOI substrate and apparatus for forming the same

Method of integrating slotted waveguide into CMOS process

Self-aligned dual depth isolation and method of fabrication

Planar and nanowire field effect transistors

Semiconductor device including storage device and method for driving the same

Complementary SOI lateral bipolar for SRAM in a low-voltage CMOS platform

NON-VOLATILE MEMORY CELL STRUCTURE AND METHOD FOR PROGRAMMING AND READING THE SAME

Complementary bipolar inverter

SEMICONDUCTOR DEVICE, SEMICONDUCTOR WAFER, AND METHODS OF MANUFACTURING THE SAME

Recessed gate field effect transistor

Highly scaled ETSOI floating body memory and memory circuit

Method of manufacturing convex shaped thin-film transistor device

METHODOLOGY FOR FABRICATING ISOTROPICALLY RECESSED SOURCE REGIONS OF CMOS TRANSISTORS

Method of protecting STI structures from erosion during processing operations

Method for manufacturing semiconductor device having SOI substrate

Method and system for hybrid integration of optical communication systems

Electronic devices and systems, and methods for making and using the same

Semiconductor device

Structure for CMOS ETSOI with multiple threshold voltages and active well bias capability

Display device and manufacturing method thereof

SCHEME TO ENABLE ROBUST INTEGRATION OF BAND EDGE DEVICES AND ALTERNATIVE CHANNELS

Barrier trench structure and methods of manufacture

Extremely thin semiconductor-on-insulator (ETSOI) FET with a back gate and reduced parasitic capacitance

Bi-directional self-aligned FET capacitor

CMOS devices incorporating hybrid orientation technology (HOT) with embedded connectors

Integrated circuit (IC) chip having both metal and silicon gate field effect transistors (FETs) and method of manufacture

Dual Cavity Etch for Embedded Stressor Regions

Semiconductor memory device and manufacturing method thereof

Semiconductor device

SEMICONDUCTOR DEVICE HAVING CONTROLLABLE TRANSISTOR THRESHOLD VOLTAGE

Method for fabricating transistor with high-K dielectric sidewall spacer

Integrated circuit diode

Semiconductor device having a trenched insulating layer coated with an oxide semiconductor film

Method of manufacturing semiconductor device

Process flow to reduce hole defects in P-active regions and to reduce across-wafer threshold voltage scatter

Thermally assisted flash memory with diode strapping

Semiconductor memory device

Method of increasing the germanium concentration in a silicon-germanium layer and semiconductor device comprising same

Directionally etched nanowire field effect transistors

Heterojunction device comprising a semiconductor oxide and a resistivity-switching oxide or nitride

Reliable electrical fuse with localized programming

System comprising a semiconductor device and structure

Shallow trench isolation for SOI structures combining sidewall spacer and bottom liner

Semiconductor device manufacturing method and semiconductor device

Method of forming a borderless contact structure employing dual etch stop layers

Method of fabricating isolated capacitors and structure thereof

SOI DEVICE HAVING AN INCREASING CHARGE STORAGE CAPACITY OF TRANSISTOR BODIES AND METHOD FOR MANUFACTURING THE SAME

eDRAM having dynamic retention and performance tradeoff

Semiconductor device and production method therefor

Semiconductor element, memory circuit, integrated circuit, and driving method of the integrated circuit

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Lateral epitaxial grown SOI in deep trench structures and methods of manufacture

SOI device with DTI and STI

Strained thin body CMOS device having vertically raised source/drain stressors with single spacer

Semiconductor memory device

Minimizing leakage current and junction capacitance in CMOS transistors by utilizing dielectric spacers

Semiconductor memory device

Semiconductor device and method for making same

Dual-depth self-aligned isolation structure for a back gate electrode

Semiconductor nanowire structure reusing suspension pads

Junction field effect transistor with an epitaxially grown gate structure

Semiconductor device and method for manufacturing the same

Polishing apparatus and polishing method

Stressed source/drain CMOS and method for forming same

Method for producing a thyristor

Semiconductor device and driving method thereof

3D semiconductor device and structure with back-bias

Semiconductor device and fabrication method therefor

Memory device

Systems and Methods For Ultrasonically Cleaving A Bonded Wafer Pair

Self-aligned dual depth isolation and method of fabrication

FIELD EFFECT TRANSISTOR

Semiconductor element, semiconductor device and methods for manufacturing thereof

Reducing defect rate during deposition of a channel semiconductor alloy into an in situ recessed active region

Hybrid MOSFET structure having drain side schottky junction

Methods for forming barrier regions within regions of insulating material resulting in outgassing paths from the insulating material and related devices

Multi-layer structures and process for fabricating semiconductor devices

Reverse construction integrated circuit

MICROCHIP AND SOI SUBSTRATE FOR MANUFACTURING MICROCHIP

Wafer with intrinsic semiconductor layer

Memory device and method for manufacturing the same

Semiconductor device

Method of manufacture transistor with reduced charge carrier mobility

Method for fabrication of configurable systems

Transistor with reduced charge carrier mobility

Semiconductor device including gate electrode having a laminate structure and a plug electrically connected thereto

Method for fabricating semiconductor wafers for the integration of silicon components with HEMTs, and appropriate semiconductor layer arrangement

Multilayer-interconnection first integration scheme for graphene and carbon nanotube transistor based integration

Semiconductor device fabrication method for improved isolation regions and defect-free active semiconductor material

Hybrid fin field-effect transistor structures and related methods

Semiconductor device and manufacturing method of semiconductor device

SOI semiconductor device comprising a substrate diode with reduced metal silicide leakage

Structure and method for adjusting threshold voltage of the array of transistors

Method for manufacturing semiconductor device

STRAINED DEVICES, METHODS OF MANUFACTURE AND DESIGN STRUCTURES

Method for manufacturing transistor

Semiconductor-on-insulator with back side connection

Trench structure and method of forming the trench structure

Integrated circuit device with series-connected field effect transistors and integrated voltage equalization and method of forming the device

METHOD FOR MANUFACTURING AN ELECTRONIC DEVICE

Lateral Power MOSFET With Integrated Schottky Diode

Semiconductor-on-insulator with back side strain inducing material

Semiconductor device having silicon on stressed liner (SOL)

Localized biasing for silicon on insulator structures

Schottky diode switch and memory units containing the same

Capacitorless DRAM on bulk silicon

Semiconductor memory device and method for manufacturing the same

Semiconductor device and production method therefor

Method for manufacturing a semiconductor device by forming portions thereof at the same time

3D integrated circuit with logic

Semiconductor device and electronic device

Capacitor and semiconductor device including dielectric and N-type semiconductor

3D integration method using SOI substrates and structures produced thereby

Wireless chip and electronic appliance having the same

Memory device and semiconductor device

Metal high-K transistor having silicon sidewalls for reduced parasitic capacitance

Semiconductor device

Extremely thin semiconductor-on-insulator (ETSOI) integrated circuit with on-chip resistors and method of forming the same

Bulk substrate FET integrated on CMOS SOI

Method for forming retrograded well for MOSFET

Semiconductor device with a wide-gap semiconductor layer on inner wall of trench

Enhanced capacitance trench capacitor

STI silicon nitride cap for flat FEOL topology

Deposition on a nanowire using atomic layer deposition

Semiconductor device and semiconductor memory device including transistor and capacitor

Semiconductor memory device including multilayer wiring layer

Storage element, storage device, signal processing circuit, and method for driving storage element

Semiconductor devices having insulating substrates and methods of formation thereof

SEMICONDUCTOR SURROUND GATE SRAM STORAGE DEVICE

Fully depleted SOI device with buried doped layer

Replacement gate CMOS

Method and system for a photonic interposer

Structure and method of forming enhanced array device isolation for implanted plate EDRAM

Structure and method to form EDRAM on SOI substrate

Method and structure for forming capacitors and memory devices on semiconductor-on-insulator (SOI) substrates

Nanomesh SRAM cell

Structure, method and system for complementary strain fill for integrated circuit chips

Semiconductor structure and method for manufacturing the same

Semiconductor device and method of manufacturing the same

Trap rich layer for semiconductor devices

Semiconductor devices and semiconductor device manufacturing methods

Transistor, semiconductor device comprising the transistor and method for manufacturing the same

Semiconductor integrated circuit device including a fin-type field effect transistor and method of manufacturing the same

Schottky diode switch and memory units containing the same

Structure and method for mobility enhanced MOSFETS with unalloyed silicide

Technique for enhancing dopant profile and channel conductivity by millisecond anneal processes

Semiconductor integrated circuit device having impurities introduced in back gate semiconductor regions

Pseudo butted junction structure for back plane connection

Structure and method for mobility enhanced MOSFETs with unalloyed silicide

CMOS structure and method for fabrication thereof using multiple crystallographic orientations and gate materials

Electronically scannable multiplexing device

Method of forming substrate contact for semiconductor on insulator (SOI) substrate

Semiconductor device

HIGH-PERFORMANCE ONE-TRANSISTOR MEMORY CELL

Biosensor devices, systems and methods therefor

Manufacturing method of a thin film transistor

Monolithic integration of photonics and electronics in CMOS processes

HIGH-VOLTAGE SEMICONDUCTOR-ON-INSULATOR DEVICE

Monolithic integration of photonics and electronics in CMOS processes

Transparent memory for transparent electronic device

Performance enhancement in PMOS and NMOS transistors on the basis of silicon/carbon material

Method of constructing a semiconductor device and structure

Semiconductor memory device

Integrated circuit made out of SOI with transistors having distinct threshold voltages

Enhanced thin film field effect transistor integration into back end of line

Method of forming a semiconductor structure

Method for manufacturing semiconductor substrate

Structure and method to fabricate a body contact

Creating anisotropically diffused junctions in field effect transistor devices

Semiconductor-on-insulator apparatus, device and system with buried decoupling capacitors

Electrostatic discharge protection device and method of fabricating same

RAM MEMORY ELEMENT WITH ONE TRANSISTOR

Methods of operating a memory device having a buried boosting plate

Method to match SOI transistors using a local heater element

Apparatus and method for controlled particle beam manufacturing

Diffusion sidewall for a semiconductor structure

Low cost fabrication of double box back gate silicon-on-insulator wafers with subsequent self aligned shallow trench isolation

SOI CMOS circuits with substrate bias

Strained semiconductor devices and methods of fabricating strained semiconductor devices

ESD protection devices for SOI integrated circuit and manufacturing method thereof

Fabrication of semiconductors with high-K/metal gate electrodes

Butted SOI junction isolation structures and devices and method of fabrication

Devices having reduced susceptibility to soft-error effects and method for fabrication

Semiconductor device including memory cell

BAW gyroscope with bottom electrode

Substrate Structure Having Buried Wiring And Method For Manufacturing The Same, And Semiconductor Device And Method For Manufacturing The Same Using The Substrate Structure

Method for fabricating a substrate provided with two active areas with different semiconductor materials

Method of providing threshold voltage adjustment through gate dielectric stack modification

SEMICONDUCTOR DEVICE AND MANUFACTURING METHODS WITH USING NON-PLANAR TYPE OF TRANSISTORS

Method for fabrication of a semiconductor device and structure

Semiconductor chips having redistributed power/ground lines directly connected to power/ground lines of internal circuits and methods of fabricating the same

Lateral epitaxial grown SOI in deep trench structures and methods of manufacture

Structure and method for using high-k material as an etch stop layer in dual stress layer process

SOI radio frequency switch with enhanced electrical isolation

Semiconductor structure and method for manufacturing the same

P-PIXEL CMOS IMAGERS USING ULTRA-THIN SILICON ON INSULATOR SUBSTRATES (UTSOI)

FORMING AN EXTREMELY THIN SEMICONDUCTOR-ON-INSULATOR (ETSOI) LAYER

SOI substrate and method for manufacturing SOI substrate

Structure of high-K metal gate semiconductor transistor

Semiconductor device fabrication method for improved isolation regions and defect-free active semiconductor material

Integrated circuit device and structure

Method of manufacturing a semiconductor device with two monocrystalline layers

Vertical semiconductor device with thinned substrate

SOI-based CMUT device with buried electrodes

Semiconductor device and structure

Method of forming enhanced capacitance trench capacitor

Vertical semiconductor device with thinned substrate

Structure and method of forming enhanced array device isolation for implanted plate eDRAM

Method and resulting capacitor structure for liquid crystal on silicon display devices

Strained thin body semiconductor-on-insulator substrate and device

Strained devices, methods of manufacture and design structures

Self-aligned strap for embedded capacitor and replacement gate devices