Process of forming an electronic device including insulating layers having different strains

Method for producing a transistor with metallic source and drain

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

Method of adjusting the threshold voltage of a transistor by a buried trapping layer

Method for manufacturing SOI substrate and SOI substrate

SRAM device

Field effect resistor for ESD protection

Process to fabricate a metal high-K transistor having first and second silicon sidewalls for reduced parasitic capacitance

Contact optimization for enhancing stress transfer in closely spaced transistors

Non-insulating stressed material layers in a contact level of semiconductor devices

Semiconductor device and method for fabricating the same

Front and backside processed thin film electronic devices

Semiconductor device

Semiconductor device

SEMICONDUCTOR DEVICE INCLUDING INDEPENDENT ACTIVE LAYERS AND METHOD FOR FABRICATING THE SAME

Metal gate transistor and resistor and method for fabricating the same

Electronic device, method for manufacturing the same, and silicon substrate for electronic device

Method for producing an integrated field-effect transistor

Method for releasing the suspended structure of a NEMS and/or NEMS component

Semiconductor device including storage device and method for driving the same

Semiconductor device having an enlarged space area surrounding an isolation trench for reducing thermal resistance and improving heat dissipation

Charging protection device

Nonvolatile semiconductor memory device

Method for manufacturing semiconductor device

Semiconductor structure for fabricating a handle wafer contact in a trench insulated SOI disc

Semiconductor dynamic quantity sensor and method of manufacturing the same

REDUCTION OF STI CORNER DEFECTS DURING SPE IN SEMICONDCUTOR DEVICE FABRICATION USING DSB SUBSTRATE AND HOT TECHNOLOGY

Epitaxy silicon on insulator (ESOI)

Method for manufacturing semiconductor substrate, and semiconductor device

Method for fabrication of a semiconductor device and structure

Semiconductor device and manufacturing method thereof

Memory arrays, semiconductor constructions and electronic systems with transistor gates extending partially over SOI and unit cells within active region pedestals

Substrates for monolithic optical circuits and electronic circuits

Method for fabrication of a semiconductor device and structure

Reverse construction memory cell

Enhancing uniformity of a channel semiconductor alloy by forming STI structures after the growth process

Reduced silicon thickness of N-channel transistors in SOI CMOS devices

High-voltage SOI MOS device structure and method of fabrication

Method for fabrication of a semiconductor device and structure

Electronically scannable multiplexing device

Inverter, logic circuit including an inverter and methods of fabricating the same

Structure and method to form EDRAM on SOI substrate

Method of reducing stacking faults through annealing

Stressed semiconductor using carbon and method for producing the same

Threshold voltage adjustment through gate dielectric stack modification

Semiconductor device including a MOS transistor and production method therefor

NROM flash memory devices on ultrathin silicon

Nonvolatile semiconductor memory device and method for manufacturing the same

Fabrication methods for radiation hardened isolation structures

SOI (silicon on insulator) structure semiconductor device and method of manufacturing the same

SRAM memory cell provided with transistors having a vertical multichannel structure

Semiconductor device having increased gate length implemented by surround gate transistor arrangements

Method of manufacturing a semiconductor device having fin-field effect transistor

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Semiconductor device and manufacturing method thereof

Apparatus of memory array using finfets

SEMICONDUCTOR DEVICE AND DISPLAY DEVICE

Trench structure and method of forming the trench structure

Nonvolatile ferroelectric memory device

Nanowire devices for enhancing mobility through stress engineering

Apparatus of memory array using FinFETs

Methods of forming printable integrated circuit devices by selective etching to suspend the devices from a handling substrate and devices formed thereby

Method and structure for performing a chemical mechanical polishing process

SOI radio frequency switch with enhanced electrical isolation

Semiconductor integrated circuit, manufacturing method thereof, and semiconductor device using semiconductor integrated circuit

Method of forming an electrical contact between a support wafer and the surface of a top silicon layer of a silicon-on-insulator wafer and an electrical device including such an electrical contact

Integrated semiconductor device and method of manufacturing the same

Method of manufacturing laminated wafer by high temperature laminating method

Method for forming CMOS transistors having metal-containing gate electrodes formed on a high-K gate dielectric material

Semiconductor device and production method therefor

Semiconductor device and manufacturing method thereof

Reducing transistor junction capacitance by recessing drain and source regions

Replacement gate CMOS

Through-gate implant for body dopant

Structure for heavy ion tolerant device, method of manufacturing the same and structure thereof

Semiconductor device and method for manufacturing the same

Memory device having buried boosting plate and methods of operating the same

Semiconductor device with selectively modulated gate work function

SOI (silicon on insulator) substrate improvements

Method and structure for performing a chemical mechanical polishing process

Method and structure for performing a chemical mechanical polishing process

System for fabricating nanocoils using a wet etch technique

Semiconductor device and manufacturing methods with using non-planar type of transistors

Field effect transistors with vertically oriented gate electrodes and methods for fabricating the same

Semiconductor storage device

Semiconductor storage device

Production method for surrounding gate transistor semiconductor device

Method of forming a semiconductor device

Methods of fabrication of semiconductor devices with low capacitance

Semiconductor device and production method therefor

Semiconductor device including a nonvolatile memory element having first, second and third insulating films

eDRAM memory cell structure and method of fabricating

Semiconductor structure

Semiconductor integrated circuit device and method of manufacturing the same

Production method for semiconductor device

High power device isolation and integration

Body contacts for FET in SOI SRAM array

Semiconductor storage device

Method of manufacturing semiconductor devices

SOI radio frequency switch with reduced signal distortion

Semiconductor-on-insulator substrate and structure including multiple order radio frequency harmonic supressing region

CMOS semiconductor device

Semiconductor surround gate SRAM storage device

Multiple crystallographic orientation semiconductor structures

Gate dielectric/isolation structure formation in high/low voltage regions of semiconductor device

Semiconductor device having a germanium layer as a channel and method for manufacturing the same

Semiconductor device

Reduction of thickness variations of a threshold semiconductor alloy by reducing patterning non-uniformities prior to depositing the semiconductor alloy

Increased depth of drain and source regions in complementary transistors by forming a deep drain and source region prior to a cavity etch

Embedded DRAM memory cell with additional patterning layer for improved strap formation

Stacked transistors and electronic devices including the same

LAMINATED FILM MANUFACTURING METHOD, SEMICONDUCTOR DEVICE MANUFACTURING METHOD, SEMICONDUCTOR DEVICE AND DISPLAY DEVICE

INTERLAYER DIELECTRIC UNDER STRESS FOR AN INTEGRATED CIRCUIT

Method and structure for performing a chemical mechanical polishing process

METHOD OF SELECTIVE OXYGEN IMPLANTATION TO DIELECTRICALLLY ISOLATE SEMICONDUCTOR DEVICES USING NO EXTRA MASKS

Method To Create SOI Layer For 3D-Stacking Memory Array

Low cost fabrication of double box back gate silicon-on-insulator wafers with built-in shallow trench isolation in back gate layer

Semiconductor device having switching element and method for fabricating semiconductor device having switching element

Semiconductor on insulator (SOI) device including a discharge path for a decoupling capacitor

LASER-IRRADIATED THIN FILMS HAVING VARIABLE THICKNESS

Semiconductor device and method for manufacturing the same

Semiconductor memory device having a floating storage bulk region capable of holding/emitting excessive majority carriers

SEMICONDUCTOR DEVICE HAVING DUMMY BIT LINE STRUCTURE

Method of fabricating hetero-junction bipolar transistor (HBT)

Microelectromechanical systems structures and self-aligned high aspect-ratio combined poly and single-crystal silicon fabrication processes for producing same

LOW COST FABRICATION OF DOUBLE BOX BACK GATE SILICON-ON-INSULATOR WAFERS WITH SUBSEQUENT SELF ALIGNED SHALLOW TRENCH ISOLATION

Semiconductor device, method for manufacturing the same, and multilayer substrate having the same

Low cost fabrication of double box back gate silicon-on-insulator wafers with built-in shallow trench isolation in back gate layer

Method for manufacturing SOI substrate and semiconductor device

Nonvolatile semiconductor memory device and method of manufacturing the same

Silicon-On-Insulator Junction Field-Effect Transistor Having A Fully Depleted Body and Fabrication Method Therefor

Junction Field-Effect Transistor Having Insulator-Isolated Source/Drain Regions and Fabrication Method Therefor

Reduction of threshold voltage variation in transistors comprising a channel semiconductor alloy by reducing deposition non-uniformities

Method for manufacturing CMOS circuits and CMOS circuits manufactured thereof

SOI device with a buried insulating material having increased etch resistivity

Method of fabricating a semiconductor on insulator device having a frontside substrate contact

Transistor device comprising an embedded semiconductor alloy having an asymmetric configuration

Metal High-K (MHK) Dual Gate Stress Engineering Using Hybrid Orientation (HOT) CMOS

SOI radio frequency switch with enhanced signal fidelity and electrical isolation

SOI radio frequency switch for reducing high frequency harmonics

Semiconductor device and its manufacturing method

Back gate doping for SOI substrates

Technique for providing stress sources in transistors in close proximity to a channel region by recessing drain and source regions

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

Stacked non-volatile memory device and methods for fabricating the same

Method and structure for integrating capacitor-less memory cell with logic

Method for forming semiconductor devices with active silicon height variation

Anisotropic stress generation by stress-generating liners having a sublithographic width

Vertical floating body cell of a semiconductor device and method for fabricating the same

CMOS transistors with differential oxygen content high-K dielectrics

Methods for producing a semiconductor device having planarization films

SOI substrates and SOI devices, and methods for forming the same

Method for reducing agglomeration of Si layer, method for manufacturing semiconductor device and vacuum treatment apparatus

Process for production of SOI substrate and process for production of semiconductor device

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Memory element with small threshold voltage variance and high-speed logic element with low power consumption

Multi-thickness semiconductor with fully depleted devices and photonic integration

Semiconductor device manufacturing method and semiconductor device

Semiconductor device including a current mirror circuit

Semiconductor device and method for manufacturing the same

Semiconductor device with ESD protection function and ESD protection circuit

Semiconductor devices and semiconductor device manufacturing methods

Depletion-type NAND flash memory

RESTRICTED STRESS REGIONS FORMED IN THE CONTACT LEVEL OF A SEMICONDUCTOR DEVICE

SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF

Semiconductor device

SEMICONDUCTOR-ON-INSULATOR (SOI) DEVICES USING VOID SPACES

MICROWAVE ACTIVATION ANNEALING PROCESS

Method for manufacturing semiconductor device

Method for manufacturing semiconductor devices using embrittled layers

Method for fabricating partial SOI substrate

Nonvolatile semiconductor memory device and manufacturing method thereof

Semiconductor device and method of manufacturing the same

High performance capacitors in planar back gates CMOS

CMOS structure and method for fabrication thereof using multiple crystallographic orientations and gate materials

Method of manufacturing semiconductor storage device

Semiconductor structure and method of forming the structure

Semiconductor memory device

Method of forming a guard ring or contact to an SOI substrate

Recessed drain and source areas in combination with advanced silicide formation in transistors

Ultrathin SOI CMOS devices employing differential STI liners

Semiconductor device with increased channel area and fabrication method thereof

Trench memory with self-aligned strap formed by self-limiting process

Method for producing stacked and self-aligned components on a substrate

APPARATUS AND METHOD FOR CONTROLLED PARTICLE BEAM MANUFACTURING

Method of operating semiconductor device

Semiconductor device having buried insulation films and method of manufacturing the same

Semiconductor device with increased channel area

Manufacturing method of semiconductor device comprising silicide layer with varied thickness

Semiconductor device having controllable transistor threshold voltage

SOI substrate contact with extended silicide area

Manufacturing method of semiconductor substrate and semiconductor device

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME

Layer transfer process and functionally enhanced integrated circuits produced thereby

eFuse and Resistor Structures and Method for Forming Same in Active Region

Semiconductor device comprising a buried poly resistor

SOI device with contact trenches formed during epitaxial growing

Recessed gate silicon-on-insulator floating body device with self-aligned lateral isolation

ULTRA-THIN OXIDE BONDING FOR SI TO SI DUAL ORIENTATION BONDING

Semiconductor device with increased channel area and decreased leakage current

Asymmetric channel doping for improved memory operation for floating body cell (FBC) memory

Stacked semiconductor device and related method

SOI device with more immunity from substrate voltage

Method for producing a thyristor

Semiconductor device

Method and system for monolithic integration of photonics and electronics in CMOS processes

Transistor, inverter including the same and methods of manufacturing transistor and inverter

Structured strained substrate for forming strained transistors with reduced thickness of active layer

Semiconductor device having vertical field effect transistor and method of manufacturing the same

Method of manufacturing semiconductor device over SOI substrate

Deep trench capacitor for SOI CMOS devices for soft error immunity

SOI MuGFETs having single gate electrode level

Logic switch and circuits utilizing the switch

Semiconductor device and methods for fabricating same

Method for simultaneously tensile and compressive straining the channels of NMOS and PMOS transistors respectively

Method of producing a field effect transistor arrangement

Dynamic memory cell methods

Computing apparatus employing dynamic memory cell structures

INTEGRATING FABRICATION OF PHOTODETECTOR WITH FABRICATION OF CMOS DEVICE ON A SILICON-ON-INSULATOR SUBSTRATE

Method for fabricating semiconductor device having radiation hardened insulators

SEMICONDUCTOR DEVICE

Method of forming a high performance fet and a high voltage fet on a SOI substrate

Dynamic random access memory cell and manufacturing method thereof

Implementing decoupling capacitors with hot-spot thermal reduction on integrated circuit chips

Semiconductor device including gate electrode having a laminate structure and plug electrically connected thereto

Component comprising a thin-film transistor and CMOS-transistors and methods for production

Semiconductor device and semiconductor device production system

Self-aligned in-laid split gate memory and method of making

Semiconductor devices with extended active regions

Performance enhancement in PMOS and NMOS transistors on the basis of silicon/carbon material

Transistor device and method of manufacturing such a transistor device

Implementing Reduced Hot-Spot Thermal Effects for SOI Circuits

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING

Direct contact to area efficient body tie process flow

Memory device

Three-dimensional silicon on oxide device isolation

Localized biasing for silicon on insulator structures

Trench capacitor for high voltage processes and method of manufacturing the same

Backside illuminated image sensor with reduced dark current

Metal high-k transistor having silicon sidewall for reduced parasitic capacitance

Integration of a floating body memory on SOI with logic transistors on bulk substrate

Dielectric layer above floating gate for reducing leakage current

Planar Metal-Insulator-Metal Circuit Element and Method for Planar Integration of Same

Manufacturing a semiconductor device via etching a semiconductor chip to a first layer

THIN FILM TRANSISTOR ARRAY DEVICES

Organic transistor having a non-planar semiconductor-insulating layer interface

Method for manufacturing SOI substrate

SEMICONDUCTOR DEVICE, INTEGRATED CIRCUIT, AND SEMICONDUCTOR MANUFACTURING METHOD

CMOS devices incorporating hybrid orientation technology (HOT) with embedded connectors

Memory device and method for manufacturing the same

Memory device and method for manufacturing the same

Silicon-on-insulator structures for through via in silicon carriers

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

SEMICONDUCTOR DEVICE AND SEMICONDUCTOR SUBSTRATE

Strained-silicon-on-insulator single-and double-gate MOSFET and method for forming the same

Semiconductor structure including gate electrode having laterally variable work function

Defect-free hybrid orientation technology for semiconductor devices

THIN SILICON SINGLE DIFFUSION FIELD EFFECT TRANSISTOR FOR ENHANCED DRIVE PERFORMANCE WITH STRESS FILM LINERS

ISOLATING BACK GATES OF FULLY DEPLETED SOI DEVICES

Method for manufacturing semiconductor device

Integrated circuit chip with FETs having mixed body thicknesses and method of manufacture thereof

Structure and design structure having isolated back gates for fully depleted SOI devices

Switching device and testing apparatus

Method to reduce parastic capacitance in a metal high dielectric constant (MHK) transistor

Structures having lattice-mismatched single-crystalline semiconductor layers on the same lithographic level and methods of manufacturing the same

Bipolar transistor and back-gated transistor structure and method

Two-step STI formation process

Methods for fabricating SOI devices

Shallow trench isolation process utilizing differential liners

Method for electronically pinning a back surface of a back-illuminated imager fabricated on a UTSOI wafer

Storage cell having a T-shaped gate electrode and method for manufacturing the same

Microstructure device including a compressively stressed low-k material layer

Methods of Fabricating Transistors and Structures Thereof

High-efficiency thinned imager with reduced boron updiffusion

Stacked transistors and process

ULTRA-THIN SOI CMOS WITH RAISED EPITAXIAL SOURCE AND DRAIN AND EMBEDDED SIGE PFET EXTENSION

SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

SOI deep trench capacitor employing a non-conformal inner spacer

Method for Making Transistors and the Device Thereof

Semiconductor substrate, semiconductor device, and method for manufacturing the semiconductor device

Transistor with high-k dielectric sidewall spacer

Structure and method for semiconductor power devices

Semiconductor device and method for manufacturing the same

Optical communication integration

Method for manufacturing SOI substrate and semiconductor device

Semiconductor device including a P-type field-effect transistor

Integrated circuit including a body transistor and method

Nonvolatile semiconductor memory device and manufacturing method thereof

Method for forming doped polysilicon via connecting polysilicon layers

Semiconductor device with multi-trench separation region

SOI transistor with merged lateral bipolar transistor

Metallized conductive strap spacer for SOI deep trench capacitor

Method of adjusting FDSOI threshold voltage through oxide charges generation in the buried oxide

Structure and method for elimination of process-related defects in poly/metal plate capacitors

METHODS OF FORMING HIGH-K/METAL GATES FOR NFETS AND PFETS

Semiconductor device and method for manufacturing same

Simultaneous buried strap and buried contact via formation for SOI deep trench capacitor

Increasing stress transfer efficiency in a transistor by reducing spacer width during the drain/source implantation sequence

Method, structure and design structure for customizing history effects of SOI circuits

SOI TRANSISTOR WITH FLOATING BODY FOR INFORMATION STORAGE HAVING ASYMMETRIC DRAIN/SOURCE REGIONS