ClassID:

209314

H01L2221/1084 - CPC Classification

Classification description:

Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by; Applying interconnections to be used for carrying current between separate components within a device; Formation and after-treatment of conductors; Barrier, adhesion or liner layers Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers

Sub-classes:
Recent Application in this class:
#1
20250069900
2025-02-27

Methods And Systems Of Forming Metal Interconnect Layers Using Engineered Templates

#2
20240186369
2024-06-06

Integrated circuit devices and methods of manufacturing the same

#3
20230369065
2023-11-16

Methods and systems of forming metal interconnect layers using engineered templates

#4
20230163164
2023-05-25

Integrated circuit devices and methods of manufacturing the same

#5
20210305061
2021-09-30

Methods and systems of forming metal interconnect layers using engineered templates

#6
20210247691
2021-08-12

Method for forming components without adding tabs during etching

#7
20210242142
2021-08-05

Semiconductor device including physical unclonable function

#8
20200395438
2020-12-17

Integrated circuit devices and methods of manufacturing the same

#9
20150348826
2015-12-03

METHOD FOR ELECTROCHEMICALLY DEPOSITING METAL ON A REACTIVE METAL FILM

#10
20150262870
2015-09-17

Barrier structure for copper interconnect

#11
20150243553
2015-08-27

Method forming through-via using electroless plating solution

#12
20140363966
2014-12-11

Pillar bumps and process for making same

#13
20140342552
2014-11-20

Method of forming a through-silicon via utilizing a metal contact pad in a back-end-of-line wiring level to fill the through-silicon via

#14
20140021477
2014-01-23

Systems, methods and materials including crystallization of substrates via sub-melt laser anneal, as well as products produced by such processes

#15
20120315753
2012-12-13

Method of forming a through-silicon via utilizing a metal contact pad in a back-end-of-line wiring level to fill the through-silicon via

#16
20120049346
2012-03-01

Pillar bumps and process for making same

#17
20110101364
2011-05-05

Systems, methods and materials including crystallization of substrates via sub-melt laser anneal, as well as products produced by such processes