ClassID:

209403

H01L2224/023 - page 2 - CPC Classification

Classification description:

Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by; Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto; Bonding areas; Manufacturing methods related thereto Redistribution layers [RDL] for bonding areas

Recent Application in this class:
#301
20100264530
2010-10-21

Stacked chip package structure with leadframe having bus bar

#302
20100264527
2010-10-21

Stacked chip package structure with leadframe having bus bar

#303
20100264522
2010-10-21

SEMICONDUCTOR DEVICE HAVING AT LEAST ONE BUMP WITHOUT OVERLAPPING SPECIFIC PAD OR DIRECTLY CONTACTING SPECIFIC PAD

#304
20100258940
2010-10-14

Ball-limiting-metallurgy layers in solder ball structures

#305
20100258926
2010-10-14

Relay board and semiconductor device having the relay board

#306
20100252933
2010-10-07

Semiconductor device

#307
20100244241
2010-09-30

Semiconductor device and method of forming a thin wafer without a carrier

#308
20100244227
2010-09-30

Semiconductor packages and electronic systems including the same

#309
20100238696
2010-09-23

Multi-chip packages including extra memory chips to define additional logical packages and related devices

#310
20100237509
2010-09-23

IO cell with multiple IO ports and related techniques for layout area saving

#311
20100237499
2010-09-23

SEMICONDUCTOR DEVICE, AND STACKED STRUCTURE, PACKAGE, MODULE, AND ELECTRONIC APPARATUS INCLUDING THE SAME, AND METHOD OF FABRICATING THE SAME

#312
20100237497
2010-09-23

Semiconductor device and method of manufacturing the same

#313
20100237484
2010-09-23

Semiconductor package

#314
20100237437
2010-09-23

Semiconductor device having finger electrodes

#315
20100231304
2010-09-16

Semiconductor device

#316
20100221908
2010-09-02

Manufacturing method of semiconductor device

#317
20100219502
2010-09-02

MIM decoupling capacitors under a contact pad

#318
20100207271
2010-08-19

SEMICONDUCTOR DEVICE

#319
20100203677
2010-08-12

Method for fabricating semiconductor packages with discrete components

#320
20100200987
2010-08-12

Semiconductor device and a method of manufacturing the same

#321
20100200977
2010-08-12

Layered chip package with wiring on the side surfaces

#322
20100197079
2010-08-05

Method of making semiconductor device packaged by sealing resin member

#323
20100187697
2010-07-29

Electronic device package and method for fabricating the same

#324
20100176494
2010-07-15

Through-silicon via with low-K dielectric liner

#325
20100171209
2010-07-08

Semiconductor device including arrangement to control connection height and alignment between a plurity of stacked semiconductor chips

#326
20100171177
2010-07-08

Semiconductor device with output circuit arrangement

#327
20100164105
2010-07-01

Semiconductor device and method of manufacturing the same

#328
20100159690
2010-06-24

Method of manufacturing semiconductor device that uses both a normal photomask and a phase shift mask for defining interconnect patterns

#329
20100155929
2010-06-24

Chip-Stacked Package Structure

#330
20100148341
2010-06-17

Semiconductor device and method for manufacturing the same

#331
20100148218
2010-06-17

SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND METHOD FOR DESIGNING THE SAME

#332
20100148173
2010-06-17

Semiconductor device and fabrication method for the same

#333
20100148172
2010-06-17

Semiconductor device

#334
20100147657
2010-06-17

NANOTUBE ESD PROTECTIVE DEVICES AND CORRESPONDING NONVOLATILE AND VOLATILE NANOTUBE SWITCHES

#335
20100144096
2010-06-10

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE IN WHICH BOTTOM SURFACE AND SIDE SURFACE OF SEMICONDUCTOR SUBSTRATE ARE COVERED WITH RESIN PROTECTIVE FILM

#336
20100144095
2010-06-10

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE IN WHICH BOTTOM SURFACE AND SIDE SURFACE OF SEMICONDUCTOR SUBSTRATE ARE COVERED WITH RESIN PROTECTIVE FILM

#337
20100140814
2010-06-10

Methods for forming an RF device with trench under bond pad feature

#338
20100140779
2010-06-10

Semiconductor package with semiconductor core structure and method of forming same

#339
20100140775
2010-06-10

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

#340
20100127345
2010-05-27

3-D circuits with integrated passive devices

#341
20100123256
2010-05-20

Semiconductor device having through electrodes, a manufacturing method thereof, and an electronic apparatus

#342
20100123246
2010-05-20

Double solid metal pad with reduced area

#343
20100123245
2010-05-20

Semiconductor integrated circuit devices and display apparatus including the same

#344
20100123236
2010-05-20

Semiconductor package having adhesive layer and method of manufacturing the same

#345
20100123163
2010-05-20

Substrate with chips mounted thereon, method of manufacturing substrate with chips mounted thereon, display, and method of manufacturing display

#346
20100117207
2010-05-13

Bond pad array for complex IC

#347
20100109151
2010-05-06

SEMICONDUCTOR DEVICE

#348
20100109146
2010-05-06

Semiconductor device

#349
20100105174
2010-04-29

SEMICONDUCTOR DEVICE

#350
20100102874
2010-04-29

Semiconductor device

#351
20100102871
2010-04-29

Electronic circuit for controlling a power field effect transistor

#352
20100102433
2010-04-29

APPARATUS FOR USE IN SEMICONDUCTOR WAFER PROCESSING FOR LATERALLY DISPLACING INDIVIDUAL SEMICONDUCTOR DEVICES AWAY FROM ONE ANOTHER

#353
20100090322
2010-04-15

Packaging systems and methods

#354
20100090318
2010-04-15

Backside connection to TSVs having redistribution lines

#355
20100084753
2010-04-08

Multi-chip package

#356
20100065969
2010-03-18

Integrated circuit device

#357
20100059872
2010-03-11

Adhesive tape, connected structure and semiconductor package

#358
20100052120
2010-03-04

Semiconductor device having a suspended isolating interconnect

#359
20100044861
2010-02-25

SEMICONDUCTOR DIE SUPPORT IN AN OFFSET DIE STACK

#360
20100032802
2010-02-11

Assembling of Electronic Members on IC Chip

#361
20100019397
2010-01-28

Method of manufacturing a wafer including providing electrical conductors isolated from circuitry

#362
20100019395
2010-01-28

Method and apparatus for improvements in chip manufacture and design

#363
20100019392
2010-01-28

STACKED DIE PACKAGE HAVING REDUCED HEIGHT AND METHOD OF MAKING SAME

#364
20100019391
2010-01-28

Semiconductor device including a transformer on chip

#365
20100015793
2010-01-21

CONTACT SURROUNDED BY PASSIVATION AND POLYMIDE AND METHOD THEREFOR

#366
20100013109
2010-01-21

FINE PITCH BOND PAD STRUCTURE

#367
20100013103
2010-01-21

Semiconductor embedded module and method for producing the same

#368
20100007011
2010-01-14

Semiconductor package and method for packaging a semiconductor package

#369
20100006997
2010-01-14

Chip-Stacked Package Structure with Leadframe Having Multi-Piece Bus Bar

#370
20100001393
2010-01-07

Semiconductor device

#371
20090325344
2009-12-31

Method of fabricating stacked wire bonded semiconductor package with low profile bond line

#372
20090321951
2009-12-31

Stacked wire bonded semiconductor package with low profile bond line

#373
20090321897
2009-12-31

Method and apparatus of power ring positioning to minimize crosstalk

#374
20090315191
2009-12-24

Semiconductor integrated circuit including plurality of bonding pads

#375
20090315167
2009-12-24

Semiconductor device

#376
20090309224
2009-12-17

Circuitry component and method for forming the same

#377
20090309205
2009-12-17

Semiconductor chip package and multichip package

#378
20090305463
2009-12-10

System and Method for Thermal Optimized Chip Stacking

#379
20090302447
2009-12-10

Semiconductor arrangement having specially fashioned bond wires

#380
20090294994
2009-12-03

Bond pad structure located over active circuit structure

#381
20090294983
2009-12-03

Methods of forming hybrid conductive vias including small dimension active surface ends and larger dimension back side ends

#382
20090294977
2009-12-03

SEMICONDUCTOR DIE AND BOND PAD ARRANGEMENT METHOD THEREOF

#383
20090289345
2009-11-26

Electronic device package and fabrication method thereof

#384
20090286357
2009-11-19

Method of manufacturing a semiconductor structure

#385
20090283905
2009-11-19

CONDUCTIVE STRUCTURE OF A CHIP

#386
20090273096
2009-11-05

High density memory device manufacturing using isolated step pads

#387
20090272974
2009-11-05

Interposer chip and multi-chip package having the interposer chip

#388
20090258486
2009-10-15

Semiconductor device fabrication method

#389
20090257208
2009-10-15

COMPACT PACKAGING FOR POWER AMPLIFIER MODULE

#390
20090256257
2009-10-15

Final via structures for bond pad-solder ball interconnections

#391
20090250822
2009-10-08

Multi-chip stack package

#392
20090243100
2009-10-01

Methods to Form a Three-Dimensionally Curved Pad in a Substrate and Integrated Circuits Incorporating such a Substrate

#393
20090243093
2009-10-01

CONTACT STRUCTURE AND CONNECTING STRUCTURE

#394
20090236724
2009-09-24

IC PACKAGE WITH WIREBOND AND FLIPCHIP INTERCONNECTS ON THE SAME DIE WITH THROUGH WAFER VIA

#395
20090230548
2009-09-17

Semiconductor package and multi-chip package using the same

#396
20090230486
2009-09-17

Piezoelectric device and electronic apparatus

#397
20090224409
2009-09-10

Semiconductor device

#398
20090221104
2009-09-03

Method of manufacturing a semiconductor device

#399
20090218698
2009-09-03

Wafer-level integrated circuit package with top and bottom side electrical connections

#400
20090218687
2009-09-03

Semiconductor chip with passivation layer comprising metal interconnect and contact pads

#401
20090218670
2009-09-03

Storage medium and semiconductor package

#402
20090212441
2009-08-27

Semiconductor interconnect structure with stacked vias separated by signal line and method therefor

#403
20090212427
2009-08-27

Solder structures including barrier layers with nickel and/or copper

#404
20090212425
2009-08-27

Semiconductor device and a method of manufacturing the same

#405
20090212424
2009-08-27

Routing structure of re-distribution layer and method for re-distributing routing structure in integrated circuit

#406
20090212412
2009-08-27

SEMICONDUCTOR PACKAGE ACCOMPLISHING FAN-OUT STRUCTURE THROUGH WIRE BONDING

#407
20090212410
2009-08-27

Stack die packages

#408
20090212093
2009-08-27

Pressure sense die pad layout and method for direct wire bonding to programmable compensation integrated circuit die

#409
20090206486
2009-08-20

Wirebond over post passivation thick metal

#410
20090200666
2009-08-13

Integrated circuit having wide power lines

#411
20090189281
2009-07-30

SEMICONDUCTOR PACKAGE AND A METHOD FOR MANUFACTURING THE SAME

#412
20090184424
2009-07-23

SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME

#413
20090184411
2009-07-23

SEMICONDUCTOR PACKAGES AND METHODS OF MANUFACTURING THE SAME

#414
20090184410
2009-07-23

Semiconductor package apparatus having redistribution layer

#415
20090179326
2009-07-16

SEMICONDUCTOR DEVICE PACKAGE

#416
20090174482
2009-07-09

High power integrated RF amplifier

#417
20090174074
2009-07-09

Semiconductor device

#418
20090168387
2009-07-02

Packaged integrated circuits having inductors and methods to form inductors in packaged integrated circuits

#419
20090166679
2009-07-02

Integrated circuit and manufacturing process facilitating selective configuration for electromagnetic compatibility

#420
20090161329
2009-06-25

Semiconductor device

#421
20090160066
2009-06-25

Semiconductor element, semiconductor device, and fabrication method thereof

#422
20090160061
2009-06-25

Introducing a metal layer between SiN and TiN to improve CBD contact resistance for P-TSV

#423
20090160058
2009-06-25

Structure and process for the formation of TSVs

#424
20090152721
2009-06-18

Semiconductor package having redistribution layer

#425
20090152709
2009-06-18

Controller chip mounted on a memory chip with re-wiring lines

#426
20090149015
2009-06-11

Manufacturing method of contact structure

#427
20090146313
2009-06-11

Semiconductor device

#428
20090146278
2009-06-11

Chip-stacked package structure with asymmetrical leadframe

#429
20090146273
2009-06-11

Semiconductor device

#430
20090140401
2009-06-04

System and Method for Improving Reliability of Integrated Circuit Packages

#431
20090140309
2009-06-04

Semiconductor device with less power supply noise

#432
20090134523
2009-05-28

Semiconductor device and method of manufacturing the same

#433
20090134516
2009-05-28

Method of manufacturing semiconductor device and semiconductor device

#434
20090134498
2009-05-28

SEMICONDUCTOR APPARATUS

#435
20090127718
2009-05-21

FLIP CHIP WAFER, FLIP CHIP DIE AND MANUFACTURING PROCESSES THEREOF

#436
20090127717
2009-05-21

Semiconductor module

#437
20090127710
2009-05-21

Undercut-free BLM process for Pb-free and Pb-reduced C4

#438
20090121348
2009-05-14

Chip structure and stacked structure of chips

#439
20090116207
2009-05-07

Method for micro component self-assembly

#440
20090115055
2009-05-07

Mounting structure of electronic component

#441
20090115054
2009-05-07

Electronic component

#442
20090109643
2009-04-30

Thin semiconductor device package

#443
20090108460
2009-04-30

Device including a semiconductor chip having a plurality of electrodes

#444
20090108453
2009-04-30

Chip structure

#445
20090108422
2009-04-30

SEMICONDUCTOR DEVICE

#446
20090104769
2009-04-23

Semiconductor chip with coil element over passivation layer

#447
20090102493
2009-04-23

Power Integrated Circuit with Bond-Wire Current Sense

#448
20090101396
2009-04-23

Electronic device

#449
20090096094
2009-04-16

Semiconductor device

#450
20090096085
2009-04-16

Thermally enhanced wafer level package

#451
20090079524
2009-03-26

MULTI-BAND TUNABLE RESONANT CIRCUIT

#452
20090065924
2009-03-12

SEMICONDUCTOR PACKAGE WITH REDUCED VOLUME AND SIGNAL TRANSFER PATH

#453
20090064496
2009-03-12

Interposer for connecting plurality of chips and method for manufacturing the same

#454
20090057925
2009-03-05

Semiconductor apparatus

#455
20090057921
2009-03-05

Flip chip for electrical function test and manufacturing method thereof

#456
20090057908
2009-03-05

Wire bond pads

#457
20090057902
2009-03-05

Method and structure for increased wire bond density in packages for semiconductor chips

#458
20090057870
2009-03-05

STACKED SEMICONDUCTOR PACKAGE WITH A REDUCED VOLUME

#459
20090050940
2009-02-26

Semiconductor device

#460
20090039487
2009-02-12

SEMICONDUCTOR DEVICE

#461
20090032964
2009-02-05

System and method for providing semiconductor device features using a protective layer

#462
20090032941
2009-02-05

Under Bump Routing Layer Method and Apparatus

#463
20090032940
2009-02-05

Conductor bump method and apparatus

#464
20090032939
2009-02-05

METHOD OF FORMING A STUD BUMP OVER PASSIVATION, AND RELATED DEVICE

#465
20090031563
2009-02-05

Rearrangement sheet, semiconductor device and method of manufacturing thereof

#466
20090026628
2009-01-29

Electrical connections for multichip modules

#467
20090026621
2009-01-29

Bond pad stacks for ESD under pad and active under pad bonding

#468
20090026611
2009-01-29

Electronic assembly having a multilayer adhesive structure

#469
20090026610
2009-01-29

Semiconductor device and method of manufacturing the same

#470
20090020857
2009-01-22

System and method for routing supply voltages or other signals between side-by-side die and a lead frame for system in a package (SIP) devices

#471
20090015353
2009-01-15

Integrated circuit with electromagnetic intrachip communication and methods for use therewith

#472
20090014843
2009-01-15

Manufacturing process and structure of through silicon via

#473
20090011540
2009-01-08

Die-wafer package and method of fabricating same

#474
20090009408
2009-01-08

INTEGRATED CIRCUIT WITH BONDING WIRE ANTENNA STRUCTURE AND METHODS FOR USE THEREWITH

#475
20090009405
2009-01-08

Integrated circuit with power supply line antenna structure and methods for use therewith

#476
20090009337
2009-01-08

RFID integrated circuit with integrated antenna structure

#477
20090008758
2009-01-08

Use of discrete conductive layer in semiconductor device to re-route bonding wires for semiconductor device package

#478
20090004784
2009-01-01

Method for fabricating semiconductor package free of substrate

#479
20090004781
2009-01-01

Method of fabricating a semiconductor die having a redistribution layer

#480
20090001610
2009-01-01

Semiconductor die having a distribution layer

#481
20090001364
2009-01-01

Semiconductor device

#482
20080316721
2008-12-25

ELECTRODE STRUCTURE BODY AND METHOD OF FORMING THE SAME, ELECTRONIC COMPONENT, AND MOUNTING SUBSTRATE

#483
20080315435
2008-12-25

Methods for stacking wire-bonded integrated circuit dice on flip-chip bonded integrated circuit dice

#484
20080315394
2008-12-25

Semiconductor package having re-distribution lines for supplying power and a method for manufacturing the same

#485
20080311740
2008-12-18

Power composite integrated semiconductor device and manufacturing method thereof

#486
20080311702
2008-12-18

Methods for stacking wire-bonded integrated circuit dice on flip-chip bonded integrated circuit dice

#487
20080308929
2008-12-18

Semiconductor device, chip package and method of fabricating the same

#488
20080303177
2008-12-11

BONDING PAD STRUCTURE

#489
20080303081
2008-12-11

Device configuration and method to manufacture trench MOSFET with solderable front metal

#490
20080290516
2008-11-27

SEMICONDUCTOR DEVICE WITH BONDING PAD SUPPORT STRUCTURE

#491
20080290478
2008-11-27

LEAD-FRAME ARRAY PACKAGE STRUCTURE AND METHOD

#492
20080284003
2008-11-20

Semiconductor package having die with recess and discrete component embedded within the recess

#493
20080272500
2008-11-06

Semiconductor device and method for manufacturing semiconductor device

#494
20080272488
2008-11-06

Semiconductor Device

#495
20080265397
2008-10-30

Chip-stacked package structure

#496
20080265386
2008-10-30

Semiconductor device

#497
20080251925
2008-10-16

TOP LAYERS OF METAL FOR INTEGRATED CIRCUITS

#498
20080246126
2008-10-09

STACKED AND SHIELDED DIE PACKAGES WITH INTERCONNECTS

#499
20080244904
2008-10-09

Method of creating contour structures to highlight inspection region

#500
20080242000
2008-10-02

Wafer-level-chip-scale package and method of fabrication

#501
20080241992
2008-10-02

Method of assembling chips

#502
20080237808
2008-10-02

Semiconductor device and method of manufacturing the same

#503
20080233740
2008-09-25

Method for producing electrically conductive bushings through non-conductive or semiconductive substrates

#504
20080233733
2008-09-25

Method of wire bonding over active area of a semiconductor circuit

#505
20080230912
2008-09-25

Wafer-level stack package and method of fabricating the same

#506
20080230908
2008-09-25

Semiconductor device with Al pad

#507
20080230877
2008-09-25

SEMICONDUCTOR PACKAGE HAVING WIRE REDISTRIBUTION LAYER AND METHOD OF FABRICATING THE SAME

#508
20080227237
2008-09-18

Method of joining chips utilizing copper pillar

#509
20080224326
2008-09-18

Chip structure with bumps and testing pads

#510
20080224322
2008-09-18

Semiconductor device having stacked dice disposed on base substrate

#511
20080224302
2008-09-18

Semiconductor module having deflecting conductive layer over a spacer structure

#512
20080224174
2008-09-18

Semiconductor device and manufacturing method of the same

#513
20080217792
2008-09-11

Semiconductor device and method of manufacturing the same

#514
20080217786
2008-09-11

Method of manufacturing semiconductor device that uses both a normal photomask and a phase shift mask for defining interconnect patterns

#515
20080211105
2008-09-04

Method of assembling chips

#516
20080210935
2008-09-04

Semiconductor wafer, semiconductor device, and semiconductor device manufacturing method

#517
20080203577
2008-08-28

Semiconductor integrated circuit device and fabrication method for the same

#518
20080203575
2008-08-28

Integrated circuit with re-route layer and stacked die assembly

#519
20080194095
2008-08-14

Undercut-free BLM process for Pb-free and Pb-reduced C4

#520
20080191349
2008-08-14

Semiconductor device with magnetic powder mixed therein and manufacturing method thereof

#521
20080182432
2008-07-31

INTERPOSER FOR CONNECTING PLURALITY OF CHIPS AND METHOD FOR MANUFACTURING THE SAME

#522
20080182120
2008-07-31

BOND PAD FOR SEMICONDUCTOR DEVICE

#523
20080174001
2008-07-24

Semiconductor device having a high frequency electrode positioned with a via hole

#524
20080174000
2008-07-24

Zigzag-stacked package structure

#525
20080169562
2008-07-17

Semiconductor device having conductive bumps and deviated solder pad

#526
20080166836
2008-07-10

Semiconductor package including connected upper and lower interconnections, and manufacturing method thereof

#527
20080160682
2008-07-03

SEMICONDUCTOR DEVICE HAVING FUSE CIRCUIT ON CELL REGION AND METHOD OF FABRICATING THE SAME

#528
20080160674
2008-07-03

Method of making a semiconductor device having multiple die redistribution layer

#529
20080157360
2008-07-03

Conductive systems and devices including wires coupled to anisotropic conductive film, and methods of forming the same

#530
20080157355
2008-07-03

Semiconductor device having multiple die redistribution layer

#531
20080153203
2008-06-26

SEMICONDUCTOR DEVICE MANUFACTURING METHOD

#532
20080146018
2008-06-19

Method for fabricating a circuit component

#533
20080142847
2008-06-19

Semiconductor apparatus having a large-size bus connection

#534
20080136023
2008-06-12

Method for manufacturing semiconductor device and semiconductor device

#535
20080128884
2008-06-05

Stacked die package

#536
20080124837
2008-05-29

Method of mounting semiconductor chip to circuit substrate using solder bumps and dummy bumps

#537
20080122081
2008-05-29

Method of fabricating electronic device having sacrificial anode, and electronic device fabricated by the same

#538
20080122080
2008-05-29

Semiconductor die with reduced bump-to-pad ratio

#539
20080116584
2008-05-22

Self-aligned through vias for chip stacking

#540
20080111255
2008-05-15

Semiconductor integrated circuit and multi-chip module

#541
20080108182
2008-05-08

Method for fabricating semiconductor package free of substrate

#542
20080105555
2008-05-08

Plating Device, Plating Method, Semiconductor Device, And Method For Manufacturing Semiconductor Device

#543
20080099915
2008-05-01

Semiconductor device and a method of manufacturing the same

#544
20080099905
2008-05-01

Method and apparatus of power ring positioning to minimize crosstalk

#545
20080099896
2008-05-01

Stacked chip package structure with leadframe having inner leads with transfer pad

#546
20080099894
2008-05-01

Semiconductor device and a method of manufacturing the same

#547
20080099892
2008-05-01

Stacked chip packaging with heat sink structure

#548
20080099887
2008-05-01

MULTI-GROUND SHIELDING SEMICONDUCTOR PACKAGE, METHOD OF FABRICATING THE PACKAGE, AND METHOD OF PREVENTING NOISE USING MULTI-GROUND SHIELDING

#549
20080090333
2008-04-17

Microelectronic packages fabricated at the wafer level and methods therefor

#550
20080088023
2008-04-17

Semiconductor device with bonding pad support structure

#551
20080088018
2008-04-17

Stacked semiconductor package having fan-out structure through wire bonding

#552
20080088013
2008-04-17

Interconnections for fine pitch semiconductor devices and manufacturing method thereof

#553
20080088004
2008-04-17

WAFER LEVEL PACKAGE STRUCTURE WITH BUILD UP LAYERS

#554
20080087987
2008-04-17

Semiconductor packaging structure having electromagnetic shielding function and method for manufacturing the same

#555
20080083992
2008-04-10

Bonding and probing pad structures

#556
20080074852
2008-03-27

Elimination of RDL using tape base flip chip on flex for die stacking

#557
20080073770
2008-03-27

Integrated circuit package system with stacked die

#558
20080067682
2008-03-20

Bonding pad for contacting a device

#559
20080061421
2008-03-13

Stacked chip package structure with leadframe having bus bar

#560
20080061412
2008-03-13

Chip-stacked package structure having leadframe with multi-piece bus bar

#561
20080061411
2008-03-13

Chip-stacked package structure for lead frame having bus bars with transfer pads

#562
20080061319
2008-03-13

Systems and methods for supporting a subset of multiple interface types in a semiconductor device

#563
20080054491
2008-03-06

Semiconductor device, relay chip, and method for producing relay chip

#564
20080054463
2008-03-06

Semiconductor apparatus and manufacturing method of semiconductor apparatus

#565
20080054441
2008-03-06

Chip package and method for fabricating the same

#566
20080048777
2008-02-28

Semiconductor device

#567
20080048319
2008-02-28

Semiconductor device having pads

#568
20080045003
2008-02-21

Method of wire bonding over active area of a semiconductor circuit

#569
20080044947
2008-02-21

Method to provide substrate-ground coupling for semiconductor integrated circuit dice constructed from SOI and related materials in stacked-die packages

#570
20080042280
2008-02-21

Semiconductor chip structure

#571
20080042275
2008-02-21

Structure for bumped wafer test

#572
20080036100
2008-02-14

Solder elements with columnar structures and methods of making the same

#573
20080036081
2008-02-14

Interconnection structure of integrated circuit chip

#574
20080036067
2008-02-14

Package structure with leadframe on offset chip-stacked structure

#575
20080035959
2008-02-14

Chip scale package for power devices and method for making the same

#576
20080023848
2008-01-31

Semiconductor device and its wiring method

#577
20080023847
2008-01-31

Semiconductor device and its wiring method

#578
20080023836
2008-01-31

Semiconductor device with interface peeling preventing rewiring layer

#579
20080023832
2008-01-31

Contact structure having a compliant bump and a test pad

#580
20080017980
2008-01-24

Chip having two groups of chip contacts

#581
20080012132
2008-01-17

Chip structure with redistribution traces

#582
20080012117
2008-01-17

Semiconductor package and method of fabricating the same and semiconductor module and method of fabricating the same

#583
20080006948
2008-01-10

Stack die packages

#584
20080001290
2008-01-03

Integrated circuit (IC) chip and method for fabricating the same

#585
20080001288
2008-01-03

Semiconductor Device and Manufacturing Method Thereof, Semiconductor Package, and Electronic Apparatus

#586
20070298602
2007-12-27

Method for applying solder to redistribution lines

#587
20070296090
2007-12-27

Die package and probe card structures and fabrication methods

#588
20070293033
2007-12-20

Microelectronic assembly with back side metallization and method for forming the same

#589
20070284712
2007-12-13

Semiconductor integrated circuit device, and method of designing and manufacturing the same

#590
20070284414
2007-12-13

Assembly and method of assembling by soldering an object and a support

#591
20070278652
2007-12-06

Semiconductor integrated circuit device

#592
20070275549
2007-11-29

Contact surrounded by passivation and polymide and method therefor

#593
20070273031
2007-11-29

Method of wire bonding over active area of a semiconductor circuit

#594
20070267755
2007-11-22

Integrated circuit having pads and input/output (I/O) cells

#595
20070264757
2007-11-15

Micro-package, multi-stack micro-package, and manufacturing method therefor

#596
20070264754
2007-11-15

Method of fabricating a semiconductor device incorporating a semiconductor constructing body and an interconnecting layer which is connected to a ground layer via a vertical conducting portion

#597
20070262436
2007-11-15

Method of fabricating microelectronic devices

#598
20070262432
2007-11-15

Integrated circuit device with semiconductor device components embedded in plastic housing composition

#599
20070257374
2007-11-08

Semiconductor chip capable of being laminated and a semiconductor device including the lamination of a plurality of semiconductor chips

#600
20070253276
2007-11-01

Method of preventing dielectric breakdown of semiconductor device and semiconductor device preventing dielectric breakdown