209404 ⎘
Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by; Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto; Bonding areas; Manufacturing methods related thereto; Redistribution layers [RDL] for bonding areas Manufacturing methods of the redistribution layers
Sub-classes:LOGIC DRIVE WITH BRAIN-LIKE ELASTICITY AND INTEGRALITY BASED ON STANDARD COMMODITY FPGA IC CHIPS USING NON-VOLATILE MEMORY CELLS
#2REDISTRIBUTION LINES WITH PROTECTION LAYERS AND METHOD FORMING SAME
#3REDUNDANT BOND PADS IN STACKED SEMICONDUCTOR ARCHITECTURES
#4SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR PACKAGE ASSEMBLY WITH EDGE SIDE INTERCONNECTION AND METHOD OF FORMING THE SAME
#5PACKAGE STRUCTURE
#6SEMICONDUCTOR STRUCTURE HAVING DIELECTRIC PLUGS PENETRATING THROUGH A POLYMER LAYER
#7PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF
#8PACKAGE
#9BONDING SCHEME TO PROVIDE IMPROVED COPLANARITY AND HIGH JOINT YIELDS WITH REDUCED COSTS AND METHODS FOR FORMING THE SAME
#10METHODS OF FORMING SEMICONDUCTOR PACKAGES
#11BOND ROUTING STRUCTURE FOR STACKED WAFERS
#12SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE
#13SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF
#14PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME
#15SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
#16PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME
#17PHOTONIC INTEGRATED PACKAGE AND METHOD FORMING SAME
#18MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTURE
#19WORKPIECE HOLDER, WAFER CHUCK, WAFER HOLDING METHOD
#20INFO STRUCTURE WITH COPPER PILLAR HAVING REVERSED PROFILE
#21SEMICONDUCTOR PACKAGE WITH THERMAL RELAXATION BLOCK AND MANUFACTURING METHOD THEREOF
#22Semiconductor Device and Method
#23CROSS-WAFER RDLS IN CONSTRUCTED WAFERS
#24METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE INCLUDING A PLURALITY OF CIRCUIT COMPONENTS AND ARRAY OF CONDUCTIVE CONTACTS
#25SEMICONDUCTOR PACKAGE, SEMICONDUCTOR PACKAGE INTERMEDIATE, REDISTRIBUTION LAYER CHIP, REDISTRIBUTION LAYER CHIP INTERMEDIATE, METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE, AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE INTERMEDIATE
#26Semiconductor Devices and Methods of Manufacturing
#27Method of Fabricating Redistribution Circuit Structure
#28Heterogeneous Fan-Out Structure and Method of Manufacture
#29FACE-TO-FACE THROUGH-SILICON VIA MULTI-CHIP SEMICONDUCTOR APPARATUS WITH REDISTRIBUTION LAYER PACKAGING AND METHODS OF ASSEMBLING SAME
#30FABRICATION METHOD FOR SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURE
#31MIM Capacitor in IC Heterogenous Integration
#32SEMICONDUCTOR DEVICE HAVING WIRED UNDER BUMP STRUCTURE AND METHOD THEREFOR
#33FACE-TO-FACE SEMICONDUCTOR DEVICE WITH FAN-OUT PORCH
#34MANUFACTURING METHOD OF SEMICONDUCTOR PACKAGE WITH THERMAL RELAXATION BLOCK
#35Package with Organic Integrated Circuit Substrate Embedded in Inorganic Carrier Body and Redistribution Structure Extending Along Both
#36WAFER CHIP SCALE PACKAGE
#37Semiconductor Device and Method of Manufacture
#38DIE STACKS AND METHODS FORMING SAME
#39PACKAGE STRUCTURE
#40INTEGRATED CIRCUIT PACKAGES HAVING MECHANICAL BRACE STANDOFFS
#41PACKAGE
#42SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME
#43INTEGRATED DEVICE COMPRISING STACKED INDUCTORS WITH LOW OR NO MUTUAL INDUCTANCE
#44METHOD OF FABRICATING PACKAGE STRUCTURE
#45SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
#46METHODS OF FORMING SEMICONDUCTOR PACKAGES HAVING A DIE WITH AN ENCAPSULANT
#47REDISTRIBUTION LINES WITH PROTECTION LAYERS AND METHOD FORMING SAME
#48PACKAGE STRUCTURE
#49Die Stacking Structure and Method Forming Same
#50SEMICONDUCTOR PACKAGE AND METHOD
#51METHOD OF FORMING PACKAGE STRUCTURE
#52STACKED VIA STRUCTURE
#53PACKAGE COMPONENT WITH STEPPED PASSIVATION LAYER
#54METHODS OF FORMING SEMICONDUCTOR PACKAGES
#55METALLIZED SEMICONDUCTOR DIE AND MANUFACTURING METHOD
#56PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF
#57PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME
#58BACKSIDE AND SIDEWALL METALLIZATION OF SEMICONDUCTOR DEVICES
#59PACKAGE INCLUDING BACKSIDE CONNECTOR AND METHODS OF FORMING THE SAME
#60SEMICONDUCTOR DEVICE WITH ADVANCED PAD STRUCTURE AND METHOD FOR FORMING SAME
#61STRUCTURE FOR THERMAL MANAGEMENT IN HYBRID BONDING
#62WAFER-LEVEL HYBRID BONDED RF SWITCH WITH REDISTRIBUTION LAYER
#63Cross-wafer RDLs in constructed wafers
#64Photonic integrated package and method forming same
#65SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR PACKAGE ASSEMBLY WITH EDGE SIDE INTERCONNECTION AND METHOD OF FORMING THE SAME
#66CHIP STRUCTURE
#67Semiconductor Device with Discrete Blocks
#68Fan-out package with cavity substrate
#69Semiconductor Device and Method of Manufacture
#70Semiconductor package and method of fabricating semiconductor package
#71Package structure
#72DEEP TRENCH CAPACITORS (DTCs) EMPLOYING BYPASS METAL TRACE SIGNAL ROUTING, AND RELATED INTEGRATED CIRCUIT (IC) PACKAGES AND FABRICATION METHODS
#73VIA FORMED IN A WAFER USING A FRONT-SIDE AND A BACK-SIDE PROCESS
#74Method And Apparatus For Fault Isolation, Computer Device, Medium And Program Product
#75Face-to-face semiconductor device with fan-out porch
#76Semiconductor device packages and methods of manufacturing the same
#77Semiconductor device and method
#78CHIP PACKAGE
#79PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF, AND SEMICONDUCTOR DEVICE
#80PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME
#81SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME
#82Semiconductor package with thermal relaxation block and manufacturing method thereof
#83Package structure with reinforcement structures in a redistribution circuit structure and manufacturing method thereof
#84Package structure and method of manufacturing the same
#85Method of fabricating redistribution circuit structure
#86Semiconductor package and method of fabricating semiconductor package
#87Method of manufacturing semiconductor package, method of handling wafer, and method of handling workpiece
#88Semiconductor package and manufacturing method thereof
#89Fan-out interconnect integration processes and structures
#90Redistribution lines with protection layers and method forming same
#91Semiconductor Packages and Methods of Forming RDL and Side and Back Protection for Semiconductor Device
#92FAN-OUT PACKAGING STRUCTURE AND METHOD FOR MANUFACTURING SAME
#93Info structure with copper pillar having reversed profile
#94Semiconductor device and method of manufacture
#95DUAL-SIDED TERMINAL DEVICE WITH SPLIT SIGNAL AND POWER ROUTING
#96Air channel formation in packaging process
#97BOND ROUTING STRUCTURE FOR STACKED WAFERS
#98Patterning Polymer Layer to Reduce Stress
#99Heterogeneous fan-out structure and method of manufacture
#100Semiconductor package and method of fabricating the same
#101SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
#102Photonic semiconductor device and method
#103STRUCTURES AND METHODS FOR REDUCING THERMAL EXPANSION MISMATCH DURING INTEGRATED CIRCUIT PACKAGING
#104Semiconductor package having a through intervia through the molding compound and fan-out redistribution layers disposed over the respective die of the stacked fan-out system-in-package
#105Redistribution substrate, method of fabricating the same, and semiconductor package including the same
#106Backside and sidewall metallization of semiconductor devices
#107Integral redistribution layer for WCSP
#108METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES
#109Face-to-face through-silicon via multi-chip semiconductor apparatus with redistribution layer packaging and methods of assembling same
#110Integrated fan-out package and the methods of manufacturing
#111Method for forming photonic integrated package
#112Semiconductor die employing repurposed seed layer for forming additional signal paths to back end-of-line (BEOL) structure, and related integrated circuit (IC) packages and fabrication methods
#113Package structure having at least one die with a plurality of taper-shaped die connectors
#114Face-to-face semiconductor device with fan-out porch
#115PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING SAME, SEMICONDUCTOR DEVICE
#116ELEMENT WITH ROUTING STRUCTURE IN BONDING LAYER
#117Redistribution layer and integrated circuit including redistribution layer
#118SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME
#119Chip scale package structure and method of forming the same
#120Method of forming brass-coated metals in flip-chip redistribution layers
#121SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
#122Semiconductor devices and methods of manufacturing
#123Die stacking structure and method forming same
#124Sidewall spacer to reduce bond pad necking and/or redistribution layer necking
#125Semiconductor device including a semiconductor die and a plurality of antenna patterns
#126Method of manufacturing a semiconductor device including a plurality of circuit components and array of conductive contacts
#127Semiconductor device having a dual material redistribution line
#128Fan-out package with cavity substrate
#129Die stacks and methods forming same
#130Package component with stepped passivation layer
#131Redistribution lines with protection layers and method forming same
#132Logic drive with brain-like elasticity and integrality based on standard commodity FPGA IC chips using non-volatile memory cells
#133Photonic semiconductor device and method
#134Manufacturing method of circuit carrier with chip mounted thereon
#135Semiconductor device and manufacturing method thereof
#136Package structure with reinforcement structures in a redistribution circuit structure and manufacturing method thereof
#137Cross-wafer RDLs in constructed wafers
#138Semiconductor packages having a die, an encapsulant, and a redistribution structure
#139Integrated high voltage capacitor
#140Semiconductor package with thermal relaxation block and manufacturing method thereof
#141Device chip scale package including a protective layer
#142Semiconductor device and method
#143Method of manufacturing semiconductor structure
#144Package structure
#145Package structure
#146Merged power pad for improving integrated circuit power delivery
#147Semiconductor device with discrete blocks
#148Method for manufacturing a wafer level chip scale package (WLCSP)
#149Semiconductor package and manufacturing method thereof
#150Package structure and method of manufacturing the same
#151Semiconductor devices and methods of manufacturing
#152Substrate comprising a high-density interconnect portion embedded in a core layer
#153Face-to-face through-silicon via multi-chip semiconductor apparatus with redistribution layer packaging and methods of assembling same
#154Method for forming package structure
#155Method of fabricating redistribution circuit structure
#156Package structure having taper-shaped conductive pillar and method of forming thereof
#157Package component with stepped passivation layer
#158Redistribution lines with protection layers and method forming same
#159Manufacturing method of semiconductor device
#160Air channel formation in packaging process
#161Semiconductor devices and methods of manufacturing the same
#162Semiconductor package and method
#163Semiconductor package and methods of manufacturing a semiconductor package
#164Structures and methods for reducing thermal expansion mismatch during integrated circuit packaging
#165Integrated circuit package with integrated voltage regulator
#166Package having bonding layers
#167Semiconductor package and method
#168Die stacking structure and method forming same
#169Semiconductor device packages and methods of manufacturing the same
#170Semiconductor device with connecting structure having a step-shaped conductive feature and method for fabricating the same
#171Package structure and semiconductor pacakge
#172Package panel processing with integrated ceramic isolation
#173Package structure and method of forming the same
#174Heterogeneous fan-out structure and method of manufacture
#175Integrated circuit packages having mechanical brace standoffs
#176Manufacturing method of carrier for semiconductor chip mounting thereon
#177Hybrid panel method of manufacturing electronic devices and electronic devices manufactured thereby
#178Semiconductor device and manufacturing method of semiconductor device
#179Semiconductor device and method of manufacture
#180Workpiece holder, wafer chuck, wafer holding method
#181Face-to-face semiconductor device with fan-out porch
#182Photonic semiconductor device and method
#183Info structure with copper pillar having reversed profile
#184Semiconductor package and method of fabricating the same
#185Brass-coated metals in flip-chip redistribution layers
#186Stress relief die implementation
#187Redistribution substrate, method of fabricating the same, and semiconductor package including the same
#188Semiconductor package and method of fabricating semiconductor package
#189Method for manufacturing a semiconductor device including patterning a polymer layer to reduce stress
#190Stacked via structure
#191Device and Method for UBM/RDL Routing
#1923DIC formation with dies bonded to formed RDLs
#193Sidewall spacer to reduce bond pad necking and/or redistribution layer necking
#194Integrated fan-out package
#195Wafer chip scale package
#196Chip package and method of fabricating the same
#197Electronic package, packaging substrate, and methods for fabricating the same
#198Fabricating active-bridge-coupled GPU chiplets
#199Package and manufacturing method of reconstructed wafer
#200Semiconductor device and method of manufacture
#201Chip package and manufacturing method thereof
#202Semiconductor device and method of manufacture
#203Fingerprint sensor device and method
#204Semiconductor device packages and methods of manufacturing the same
#205Method of manufacturing chip packaging structure
#206Embedded component package structure and manufacturing method thereof
#207Cross-wafer RDLs in constructed wafers
#208METHODS AND APPARATUS FOR DETERMINING ENDPOINTS FOR CHEMICAL MECHANICAL PLANARIZATION IN WAFER-LEVEL PACKAGING APPLICATIONS
#209Semiconductor package, manufacturing method of semiconductor device and semiconductor package
#210Die stacks and methods forming same
#211Package structure and manufacturing method thereof
#212Semiconductor device, package structure including a heat dissipation element having a conductive base and a plurality of antenna patterns and method of fabricating the semiconductor device
#213Fan-out package with cavity substrate
#214Semiconductor device comprising semiconductor die and interposer and manufacturing method thereof
#215Dual-gate trench IGBT with buried floating P-type shield
#216Method of forming semiconductor device having a dual material redistribution line and semiconductor device
#217Package structure with reinforcement structures in a redistribution circuit structure and manufacturing method thereof
#218Method of manufacturing package structure
#219Photonic integrated package and method forming same
#220INTEGRATED CIRCUIT PACKAGE ASSEMBLIES WITH HIGH-ASPECT RATIO METALLIZATION FEATURES
#221Logic drive with brain-like elasticity and integrality based on standard commodity FPGA IC chips using non-volatile memory cells
#222Semiconductor device and method to minimize stress on stack via
#223Package structure and method of forming thereof
#224Method of manufacturing intergrated fan-out package with redistribution structure
#225Air channel formation in packaging process
#226Semiconductor package
#227Packaged semiconductor devices for high voltage with die edge protection
#228Via structure for packaging and a method of forming
#229SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF
#230Wafer level fan-out application specific integrated circuit bridge memory stack
#231Stacked via structure
#232Integrated fan-out package structures with recesses in molding compound
#233Semiconductor device package and method of manufacturing the same
#234Semiconductor device and methods of manufacturing
#235SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF
#236Package structure and method of manufacturing the same
#237Semiconductor packages and methods of manufacturing the same
#238SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
#239Fan-out interconnect structure and method for forming same
#240Die stacks and methods forming same
#241Bonding support structure (and related process) for wafer stacking
#242Integrated circuit package with integrated voltage regulator
#243Manufacturing method of semiconductor package including thermal conductive block
#244Package structure having redistribution layer structures
#245Package structures and methods of forming
#246Apparatuses including redistribution layers and related microelectronic devices
#247Package structure and method of manufacturing the same
#248Fan-out packages with warpage resistance
#249Package structure and method of forming the same
#250Semiconductor devices and methods of forming the same
#251Package structure and method of fabricating the same
#252Semiconductor device and method of fabricating the same
#253Chip packaging structure
#254Manufacturing method of substrate structure
#255Semiconductor package
#256Method for manufacturing electronic package
#257Batch manufacture of component carriers
#258Package panel processing with integrated ceramic isolation
#259Semiconductor device, package structure and method of fabricating the same
#260Package structure and manufacturing method thereof
#261RF devices with enhanced performance and methods of forming the same
#262Semiconductor device package and method of manufacturing the same
#263Package structure with dam structure and method for forming the same
#264Electronic package, packaging substrate, and methods for fabricating the same
#265Component carrier with included electrically conductive base structure and method of manufacturing
#266Embedded voltage regulator structure and method forming same
#267Logic drive with brain-like elasticity and integrality based on standard commodity FPGA IC chips using non-volatile memory cells
#268Chip package structure and method for forming chip package
#269Integrated circuit package and method
#270Redistribution layers in semiconductor packages and methods of forming same
#271Semiconductor device and method of manufacture
#272Through-substrate via structures in semiconductor devices
#273Semiconductor devices and methods of forming same
#274Semiconductor device including conductive structure
#275Electronic component and device
#276Chip packaging structure and manufacturing method thereof
#277Package structure, die and method of manufacturing the same
#278Metal-bump sidewall protection
#279Sidewall spacer to reduce bond pad necking and/or redistribution layer necking
#280Patterning polymer layer to reduce stress
#281Method of manufacturing semiconductor package
#282Package structure and manufacturing method thereof
#283Package structure, semiconductor package and method of fabricating the same
#284Method for forming pattern and manufacturing method of package
#285Semiconductor package and method of fabricating the same
#286Structures and methods for reliable packages
#287Semiconductor device with discrete blocks
#288Semiconductor structure and manufacturing method thereof
#289Methods for controlling warpage in packaging
#290Manufacturing method of semiconductor package
#291Semiconductor structure and method of forming
#292Solder ball protection in packages
#293Semiconductor device structure having semiconductor die bonded to redistribution layer via electrical pad with barrier layer
#294Semiconductor devices including redistributed layer structures and methods of forming semiconductor devices including redistributed layer structures
#295Carrier for chip packaging and manufacturing method thereof
#296Fingerprint sensor device and method
#297Multi-die microelectronic device with integral heat spreader
#298Fan-out wafer level packaging of semiconductor devices
#299Package structure with reinforcement structures in a redistribution circuit structure and method of manufacturing the same
#300Semiconductor package