ClassID:

209565

H01L2224/08111 - CPC Classification

Classification description:

Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by; Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto; Bonding areas; Manufacturing methods related thereto; Structure, shape, material or disposition of the bonding areas after the connecting process of an individual bonding area; Disposition the bonding area being disposed in a recess of the surface of the body

Recent Application in this class:
#1
20250384906
2025-12-18

BUFFER CHIP, AND SEMICONDUCTOR PACKAGE INCLUDING THE BUFFER CHIP AND A MEMORY CHIP

#2
20250329675
2025-10-23

SEMICONDUCTOR DEVICE AND METHODS OF FORMATION

#3
20250323213
2025-10-16

SEMICONDUCTOR PACKAGE

#4
20250316640
2025-10-09

SEMICONDUCTOR PACKAGE

#5
20250259914
2025-08-14

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME

#6
20250253292
2025-08-07

CHIP PACKAGE STRUCTURE WITH CONDUCTIVE VIA STRUCTURE AND METHOD FOR FORMING THE SAME

#7
20250246521
2025-07-31

SEMICONDUCTOR DEVICE WITH DUAL DOWNSET LEADFRAME AND METHOD THEREFOR

#8
20250233115
2025-07-17

Semiconductor Packages and Methods of Forming Same

#9
20250167157
2025-05-22

MICROELECTRONIC DEVICE OBTAINED BY 3D INTEGRATION AND CORRESPONDING PRODUCTION METHOD

#10
20250087648
2025-03-13

METHOD FOR FORMING PACKAGE STRUCTURE

#11
20240429111
2024-12-26

SEMICONDUCTOR MEMORY MODULE INCLUDING FIXING STRUCTURE

#12
20240304530
2024-09-12

POWER CONVERTER APPARATUS

#13
20240249753
2024-07-25

BUFFER CHIP, AND SEMICONDUCTOR PACKAGE INCLUDING THE BUFFER CHIP AND A MEMORY CHIP

#14
20240120303
2024-04-11

SEMICONDUCTOR STRUCTURE

#15
20240105549
2024-03-28

HEATSINK FOR RING TYPE INTEGRATED CIRCUITS

#16
20240014192
2024-01-11

Package structure

#17
20230411326
2023-12-21

Semiconductor structure and manufacturing method thereof

#18
20230361074
2023-11-09

LOW TEMPERATURE DIRECT BONDING

#19
20230299029
2023-09-21

EXPANSION CONTROL FOR BONDING

#20
20220392862
2022-12-08

PACKAGE STRUCTURE WITH WETTABLE SIDE SURFACE AND MANUFACTURING METHOD THEREOF, AND VERTICAL PACKAGE MODULE

#21
20220285323
2022-09-08

Semiconductor packages and methods of forming same

#22
20220208649
2022-06-30

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME

#23
20220059515
2022-02-24

Method of forming package structure

#24
20210217672
2021-07-15

Packaging mechanisms for dies with different sizes of connectors

#25
20200343224
2020-10-29

Semiconductor packages and methods of forming same

#26
20200294962
2020-09-17

Method for producing a connection between component parts, and component made of component parts

#27
20200126941
2020-04-23

Semiconductor device for bonding conductive layers exposed from surfaces of respective interconnection layers

#28
20200043909
2020-02-06

Method and structure of three-dimensional chip stacking

#29
20200035643
2020-01-30

Semiconductor device, manufacturing method, and solid-state imaging device

#30
20190355693
2019-11-21

Dual-interface IC card module

#31
20190341319
2019-11-07

Packaging mechanisms for dies with different sizes of connectors

#32
20190267354
2019-08-29

Semiconductor packages and methods of forming same

#33
20190244899
2019-08-08

Increased contact alignment tolerance for direct bonding

#34
20190172818
2019-06-06

Method of forming package structure

#35
20180151546
2018-05-31

Package structure and method of forming thereof

#36
20180019236
2018-01-18

Method and structure of three-dimensional chip stacking

#37
20170092612
2017-03-30

Dual-interface IC card module

#38
20170084589
2017-03-23

Semiconductor package structure and method for forming the same

#39
20170053882
2017-02-23

Electronic device having a redistribution area

#40
20160254160
2016-09-01

Method of manufacturing semiconductor device and semiconductor device

#41
20150325538
2015-11-12

SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE

#42
20150318264
2015-11-05

Stacked dies with wire bonds and method

#43
20150187742
2015-07-02

Semiconductor package, fabrication method therefor, and package-on package

#44
20150171064
2015-06-18

PACKAGE ASSEMBLY AND METHOD FOR MANUFACTURING THE SAME

#45
20150171036
2015-06-18

Electrical interconnect for an integrated circuit package and method of making same

#46
20140332946
2014-11-13

Semiconductor package and stacked semiconductor package having the same

#47
20140015088
2014-01-16

Three-dimensional integrated structure capable of detecting a temperature rise

#48
20130026651
2013-01-31

Semiconductor package and stacked semiconductor package having the same

#49
20120068355
2012-03-22

Semiconductor device and method for manufacturing the same

#50
20100072598
2010-03-25

Semiconductor package and stacked semiconductor package having the same