209641 ⎘
Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by; Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto; Bump connectors; Manufacturing methods related thereto; Manufacturing methods using a lift-off mask Permanent masks, i.e. masks left in the finished device, e.g. passivation layers
SEMICONDUCTOR DEVICE INTERCONNECT STRUCTURE
#2Integrated circuit structure and method for reducing polymer layer delamination
#3Interconnect structures and methods of forming same
#4Fabrication of solder balls with injection molded solder
#5Fabrication method of semiconductor structure
#6Interconnect structures and methods of forming same
#7Bond pads with surrounding fill lines
#8Methods of processing semiconductor devices
#9Electronic devices having tapered edge walls
#103D integration method using SOI substrates and structures produced thereby
#113D integration method using SOI substrates and structures produced thereby
#12ELECTRICAL COMPONENT WITH THIN SOLDER RESIST LAYER AND METHOD FOR THE PRODUCTION THEREOF
#133D integration method using SOI substrates and structures produced thereby
#14Fabrication of solder balls with injection molded solder
#15Interconnect structures and methods of forming same
#16Fabrication of solder balls with injection molded solder
#17Chip mounting structure
#18Method of fabricating electronic package
#19Semiconductor devices, methods of manufacture thereof, and semiconductor device packages
#20Fabrication method of semiconductor structure
#21Open-passivation ball grid array pads
#22Integrated circuit structure and method for reducing polymer layer delamination
#23Semiconductor chip with patterned underbump metallization and polymer film
#24Pillar design for conductive bump
#25Photoresist cleaning composition used in photolithography and a method for treating substrate therewith
#26Chip mounting structure
#27Magnetic intermetallic compound interconnect
#28Double-sided vertical semiconductor device with thinned substrate
#29Integrated WLUF and SOD process
#30Semiconductor structure and method of fabricating the same
#31Photosensitive resin composition, film adhesive, adhesive sheet, adhesive pattern, semiconductor wafer with adhesive layer, and semiconductor device
#32Organic thin film passivation of metal interconnections
#33Electronic package and fabrication method thereof
#34Method of manufacturing a semiconductor device and interconnection structures thereof
#35Interconnect structures and methods of forming same
#36Fabricating pillar solder bump
#37Semiconductor devices having through electrodes, methods of manufacturing the same, and semiconductor packages including the same
#38Semiconductor devices having through electrodes, methods of manufacturing the same, and semiconductor packages including the same
#39Semiconductor chip with patterned underbump metallization and polymer film
#40Semiconductor device, imaging device and semiconductor device manufacturing method
#41Method of fabricating bump structure and bump structure
#42Stacked chips with through electrodes
#43Stacked chips electrically connected by a plurality of juncture portions
#44Copper-containing C4 ball-limiting metallurgy stack for enhanced reliability of packaged structures and method of making same
#45Ablation method and recipe for wafer level underfill material patterning and removal
#46Copper pillar bump and flip chip package using same
#47Conductive structure and method for forming the same
#48Pillar design for conductive bump
#49Techniques for fabricating fine-pitch micro-bumps
#50Fabrication method of wiring structure for improving crown-like defect
#51Solder in cavity interconnection technology
#52Semiconductor devices, methods of manufacture thereof, and semiconductor device packages
#53Semiconductor chip package and method for manufacturing thereof
#54Method for producing a structure for microelectronic device assembly
#55Method of making an electronic device having a liquid crystal polymer solder mask laminated to an interconnect layer stack and related devices
#56Organic thin film passivation of metal interconnections
#57Dense interconnect with solder cap (DISC) formation with laser ablation and resulting semiconductor structures and packages
#58Integrated WLUF and SOD process
#59Integrated circuit package having offset vias
#60CTE ADAPTION IN A SEMICONDUCTOR PACKAGE
#61Coaxial solder bump support structure
#62Protected solder ball joints in wafer level chip-scale packaging
#63Methods for forming semiconductor device packages
#64Semiconductor device including a stress buffer material formed above a low-k metallization system
#65Metal bonded structure and metal bonding method
#66Double-sided vertical semiconductor device with thinned substrate
#67Conductive structure and method for forming the same
#68Wafer-level chip scale package
#69METHOD FOR FORMING BUMPS AND SUBSTRATE INCLUDING THE BUMPS
#70Coaxial solder bump support structure
#71SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME
#72Pillar design for conductive bump
#73Methods of forming a metal pattern
#74CONDUCTIVE STRUCTURE FOR A SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD FOR FORMING THE SAME
#75Semiconductor Device and Method of Providing Common Voltage Bus and Wire Bondable Redistribution
#76Semiconductor device and method of manufacturing the same
#77Solder bump interconnect
#78Extended under-bump metal layer for blocking alpha particles in a semiconductor device
#793D integration method using SOI substrates and structures produced thereby
#80Method of making an electronic device having a liquid crystal polymer solder mask laminated to an interconnect layer stack and related devices
#81Soft error rate mitigation by interconnect structure
#82Semiconductor device and method of forming passive devices
#83Wiring structure for improving crown-like defect and fabrication method thereof
#84METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE HAVING A REFRACTORY METAL CONTAINING FILM
#85Semiconductor device and method for manufacturing the same
#86Manufacturing method of bump structure with annular support
#87Bump structure and fabrication method thereof
#88Controlling Solder Bump Profiles by Increasing Heights of Solder Resists
#89Semiconductor substrate structure and semiconductor device
#90Method of fabricating bump structure
#91Magnetic intermetallic compound interconnect
#92Methods of forming a metal pattern and semiconductor device structure
#93Direct IMS (injection molded solder) without a mask for forming solder bumps on substrates
#94Solder bump interconnect
#95Solder in cavity interconnection technology
#96Structure, electronic device, and method for fabricating a structure
#97Semiconductor device and method for making the same
#98EXTENDED UNDER-BUMP METAL LAYER FOR BLOCKING ALPHA PARTICLES IN A SEMICONDUCTOR DEVICE
#99Integrated (multilayer) circuits and process of producing the same
#100SEMICONDUCTOR DEVICE HAVING WAFER-LEVEL CHIP SIZE PACKAGE
#101Enhanced copper posts for wafer level chip scale packaging
#102SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE
#103Method of forming a semiconductor device including a stress buffer material formed above a low-k metallization system
#104Method of manufacturing ball grid array type semiconductor device
#105LOW-COST FLIP-CHIP INTERCONNECT WITH AN INTEGRATED WAFER-APPLIED PHOTO-SENSITIVE ADHESIVE AND METAL-LOADED EPOXY PASTE SYSTEM
#106Semiconductor device and method for fabricating the same
#107Top layers of metal for high performance IC's
#108Copper-containing C4 ball-limiting metallurgy stack for enhanced reliability of packaged structures and method of making same
#109IC die having TSV and wafer level underfill and stacked IC devices comprising a workpiece solder connected to the TSV
#110Enhanced reliability for semiconductor devices using dielectric encasement
#111Maskless Process for Solder Bump Production
#112SEMICONDUCTOR DEVICE HAVING SOLDER BUMPS PROTRUDING BEYOND INSULATING FILMS
#113Top layers of metal for high performance IC's
#114Maskless Process for Solder Bumps Production
#115Transponder and method of producing a transponder
#116SEMICONDUCTOR DEVICE
#117Process for Preparing a Solder Stand-Off
#118Semiconductor device fabrication method
#119Semiconductor device having a refractory metal containing film and method for manufacturing the same
#120Top layers of metal for high performance IC's
#121Soft error rate mitigation by interconnect structure
#122Protected solder ball joints in wafer level chip-scale packaging
#123Method for forming an electrical structure comprising multiple photosensitive materials
#124FLIP CHIP WAFER, FLIP CHIP DIE AND MANUFACTURING PROCESSES THEREOF
#125SOI on package hypersensitive sensor
#126Top layers of metal for high performance IC's
#127Semiconductor device and method of providing common voltage bus and wire bondable redistribution
#128Under Bump Routing Layer Method and Apparatus
#129Electronic device manufacturing method and electronic device
#130Under bump metallurgy structure and wafer structure using the same and method of manufacturing wafer structure
#131Solder bump interconnect for improved mechanical and thermo-mechanical performance
#132Enhanced copper posts for wafer level chip scale packaging
#133INTEGRATED CIRCUIT PACKAGE WITH SOLDERED LID FOR IMPROVED THERMAL PERFORMANCE
#134Semiconductor device and manufacturing method of the same
#135Semiconductor device
#136Method to create a metal pattern using a damascene-like process
#137Chip package structure
#138Top layers of metal for high performance IC's
#139Conductive pattern formation method
#140Conductive structure for a semiconductor integrated circuit and method for forming the same
#141Semiconductor device comprising electromigration prevention film and manufacturing method thereof
#142Component with buried ductile conductive bumps and method of electrical connection between said component and a component equipped with hard conductive points
#143Bump structure with annular support
#144Semiconductor device and method of forming passive devices
#145Top layers of metal for high performance IC's
#146Top layers of metal for high performance IC's
#147Top layers of metal for high performance IC's
#148Chip and manufacturing method and application thereof
#149Integrated circuit chips with fine-line metal and over-passivation metal
#150Plating Device, Plating Method, Semiconductor Device, And Method For Manufacturing Semiconductor Device
#151Solder ball mounting method and solder ball mounting substrate manufacturing method
#152Solder pillar bumping and a method of making the same
#153Top layers of metal for high performance IC's
#154Top layers of metal for high performance IC's
#155Integrated circuit chips with fine-line metal and over-passivation metal
#156INTEGRATED CIRCUIT CHIPS WITH FINE-LINE METAL AND OVER-PASSIVATION METAL
#157Integrated circuit chips with fine-line metal and over-passivation metal
#158Integrated circuit chips with fine-line metal and over-passivation metal
#159Integrated circuit chips with fine-line metal and over-passivation metal
#160INTEGRATED CIRCUIT CHIPS WITH FINE-LINE METAL AND OVER-PASSIVATION METAL
#161Top layers of metal for high performance IC's
#162Top layers of metal for high performance IC's
#163Top layers of metal for high performance IC's
#164Solder elements with columnar structures and methods of making the same
#165Solder bumps in flip-chip technologies
#166Top layers of metal for high performance IC's
#167Top layers of metal for high performance IC's
#168Top layers of metal for high performance IC's
#169Top layers of metal for high performance IC's
#170Top layers of metal for high performance IC's
#171Top layers of metal for high performance IC's
#172Top layers of metal for high performance IC's
#173Top layers of metal for high performance IC's
#174Top layers of metal for high performance IC's
#175Top layers of metal for high performance IC's
#176Top layers of metal for high performance IC's
#177Top layers of metal for high performance IC's
#178Top layers of metal for high performance IC's
#179Top layers of metal for high performance IC's
#180Top layers of metal for high performance IC's
#181Top layers of metal for high performance IC's
#182Top layers of metal for high performance IC's
#183Top layers of metal for high performance IC's
#184Top layers of metal for high performance IC's
#185Top layers of metal for high performance IC's
#186HIGHLY COMPLIANT PLATE FOR WAFER BONDING
#187Top layers of metal for high performance IC's
#188Top layers of metal for high performance IC's
#189Top layers of metal for high performance IC's
#190Top layers of metal for high performance IC's
#191Top layers of metal for high performance IC's
#192Top layers of metal for high performance IC's
#193Top layers of metal for high performance IC's
#194Top layers of metal for high performance IC's
#195Top layers of metal for high performance IC's
#196Top layers of metal for high performance IC's
#197Top layers of metal for high performance IC's
#198Top layers of metal for high performance IC's
#199Top layers of metal for high performance IC's
#200Top layers of metal for high performance IC's
#201Top layers of metal for high performance IC's
#202Top layers of metal for high performance IC's
#203Top layers of metal for high performance IC's
#204Top layers of metal for high performance IC's
#205Top layers of metal for high performance IC's
#206Top layers of metal for high performance IC's
#207Top layers of metal for high performance IC's
#208Top layers of metal for high performance IC's
#209Top layers of metal for high performance IC's
#210Top layers of metal for high performance IC's
#211Top layers of metal for high performance IC's
#212Top layers of metal for high performance IC's
#213Top layers of metal for high performance IC's
#214Top layers of metal for high performance IC's
#215Top layers of metal for high performance IC's
#216Top layers of metal for high performance IC's
#217Method for forming C4 connections on integrated circuit chips and the resulting devices
#218Conductive structures including titanium-tungsten base layers
#219Flip-attached and underfilled stacked semiconductor devices
#220Method for fabricating last level copper-to-C4 connection with interfacial cap structure
#221Semiconductor device, method of manufacturing the same, and camera module
#222Electronic device and method of manufacturing the same
#223Sequential fabrication of vertical conductive interconnects in capped chips
#224Chip package structure
#225Electronic circuit device and method of manufacturing the same
#226SEMICONDUCTORS AND METHODS OF MAKING
#227Wiring structure of a semiconductor package and method of manufacturing the same, and wafer level package having the wiring structure and method of manufacturing the same
#228Self-assembled interconnection particles
#229Electronic board and manufacturing method thereof, electro-optical device, and electronic apparatus
#230Intermediate semiconductor device structures
#231Solder bumps in flip-chip technologies
#232Aluminum cap with electroless nickel/immersion gold
#233Copper-containing C4 ball-limiting metallurgy stack for enhanced reliability of packaged structures and method of making same
#234Semiconductor device and fabrication method thereof
#235Method of manufacturing a semiconductor device
#236Polymer encapsulated dicing lane (PEDL) technology for Cu/low/ultra-low k devices
#237Top layers of metal for high performance IC's
#238Top layers of metal for high performance IC's
#239Collars, support structures, and forms for protruding conductive structures
#240Top layers of metal for high performance IC's
#241Highly compliant plate for wafer bonding
#242Top layers of metal for high performance IC's
#243Top layers of metal for high performance IC's
#244Top layers of metal for high performance IC's
#245Process for fabricating chip package structure
#246Semiconductor device having a refractory metal containing film and method for manufacturing the same
#247Method of connecting base materials
#248Chip package structure and process for fabricating the same
#249Semiconductor flip-chip package and method for the fabrication thereof
#250Semiconductor chip, semiconductor device, method for producing semiconductor device, and electronic equipment
#251Integrated circuit die and substrate coupling
#252Top layers of metal for high performance IC's
#253Methods including fabrication of substrates and other semiconductor device components with collars on or around the contact pads thereof
#254Top layers of metal for high performance IC's
#255Semiconductor device and manufacturing method for the same
#256Wafer-level package and method for production thereof
#257Porous adhesive sheet, semiconductor wafer with porous adhesive sheet and method of manufacture thereof
#258Selective deposition of solder ball contacts
#259Method for selective electroplating of semiconductor device I/O pads using a titanium-tungsten seed layer
#260Porous adhesive sheet, semiconductor wafer with porous adhesive sheet and method of manufacture thereof
#261Wafer-level chip scale package
#262Method of bonding semiconductor devices
#263Methods of forming conductive structures including titanium-tungsten base layers and related structures
#264Aluminum cap with electroless nickel/immersion gold
#265Semiconductor device and manufacturing method thereof
#266Semiconductor device and manufacturing method thereof