ClassID:

209585

H01L2224/10 - CPC Classification

Classification description:

Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by; Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto Bump connectors; Manufacturing methods related thereto

Sub-classes:
Recent Application in this class:
#1
20210375725
2021-12-02

Semiconductor devices including through-silicon-vias and methods of manufacturing the same and semiconductor packages including the semiconductor devices

#2
20210074625
2021-03-11

Graphite-laminated chip-on-film-type semiconductor package having improved heat dissipation and electromagnetic wave shielding functions

#3
20200355958
2020-11-12

Graphite-laminated chip-on-film-type semiconductor package allowing improved visibility and workability

#4
20200295029
2020-09-17

Three-dimensional memory device having bonding structures connected to bit lines and methods of making the same

#5
20200066745
2020-02-27

Three-dimensional memory device having bonding structures connected to bit lines and methods of making the same

#6
20190348332
2019-11-14

Method of manufacturing semiconductor device

#7
20190189837
2019-06-20

Vertical type light emitting diode die and method for fabricating the same

#8
20190189836
2019-06-20

Vertical type light emitting diode die and method for fabricating the same

#9
20190172845
2019-06-06

Array Structure, Manufacturing Method Thereof, Array Substrate and Display Device

#10
20190057913
2019-02-21

MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE

#11
20180358323
2018-12-13

PRESSING SOLDER BUMPS TO MATCH PROBE PROFILE DURING WAFER LEVEL TESTING

#12
20180358322
2018-12-13

PRESSING SOLDER BUMPS TO MATCH PROBE PROFILE DURING WAFER LEVEL TESTING

#13
20180358321
2018-12-13

PRESSING SOLDER BUMPS TO MATCH PROBE PROFILE DURING WAFER LEVEL TESTING

#14
20180315674
2018-11-01

Package process method including disposing a die within a recess of a one-piece material

#15
20180175113
2018-06-21

Semiconductor device having a protruding interposer edge face

#16
20180145001
2018-05-24

Manufacturing method of semiconductor device

#17
20180102470
2018-04-12

Cryogenic electronic packages and assemblies

#18
20180102469
2018-04-12

Cryogenic electronic packages and methods for fabricating cryogenic electronic packages

#19
20170077574
2017-03-16

Flip-chip employing integrated cavity filter, and related components, systems, and methods

#20
20170025343
2017-01-26

Circuit substrate, semiconductor package and process for fabricating the same

#21
20160336244
2016-11-17

Semiconductor device with bond pad wiring lead-out arrangement avoiding bond pad probe mark area

#22
20160284570
2016-09-29

Encapsulated dies with enhanced thermal performance

#23
20160284568
2016-09-29

Encapsulated dies with enhanced thermal performance

#24
20160276367
2016-09-22

Array structure, manufacturing method thereof, array substrate and display device

#25
20160079304
2016-03-17

Method for fabricating an image sensor package

#26
20150156882
2015-06-04

PRINTED CIRCUIT BOARD, MANUFACTURING METHOD THEREOF, AND SEMICONDUCTOR PACKAGE

#27
20140361299
2014-12-11

Semiconductor device

#28
20140293547
2014-10-02

Circuit substrate, semiconductor package and process for fabricating the same

#29
20140264692
2014-09-18

Low profile sensor module and method of making same

#30
20140231991
2014-08-21

Method of fabricating three dimensional integrated circuit

#31
20140218998
2014-08-07

Semiconductor package

#32
20140061900
2014-03-06

Semiconductor package with improved redistribution layer design and fabricating method thereof

#33
20130277829
2013-10-24

Method of fabricating three dimensional integrated circuit

#34
20130256895
2013-10-03

STACKED SEMICONDUCTOR COMPONENTS WITH UNIVERSAL INTERCONNECT FOOTPRINT

#35
20130133928
2013-05-30

Printed circuit board including a plurality of circuit layers and method for manufacturing the same

#36
20120077310
2012-03-29

Manufacturing method of semiconductor device

#37
20110186978
2011-08-04

STACK PACKAGE

#38
20090309178
2009-12-17

Image sensor package and fabrication method thereof

#39
20090243118
2009-10-01

Semiconductor device and manufacturing method of the same

#40
20090186449
2009-07-23

Method for fabricating package structures for optoelectronic devices

#41
20090181490
2009-07-16

Image sensing devices and methods for fabricating the same

#42
20090166667
2009-07-02

Substrate for light-emitting diode, and light-emitting diode

#43
20090032893
2009-02-05

Image sensor package

#44
20090001495
2009-01-01

Image sensor package and fabrication method thereof

#45
20080290438
2008-11-27

Image sensing devices and methods for fabricating the same

#46
20080191343
2008-08-14

Integrated circuit package having large conductive area and method for fabricating the same

#47
20080169477
2008-07-17

Package structure for optoelectronic device and fabrication method thereof

#48
20080164550
2008-07-10

Electronic assembly for image sensor device and fabrication method thereof

#49
20080106356
2008-05-08

Ball grid array resonator

#50
20080023639
2008-01-31

Ultraviolet Irradiation Apparatus

#51
20070145590
2007-06-28

Semiconductor device and manufacturing method of the same

#52
20070117277
2007-05-24

Methods for fabricating protective layers on semiconductor device components

#53
20070107186
2007-05-17

Method and system for high volume transfer of dies to substrates

#54
20060246702
2006-11-02

NON-SOLDER MASK DEFINED (NSMD) TYPE WIRING SUBSTRATE FOR BALL GRID ARRAY (BGA) PACKAGE AND METHOD FOR MANUFACTURING SUCH A WIRING SUBSTRATE

#55
20050156331
2005-07-21

Semiconductor devices having stereolithographically fabricated protective layers thereon through which contact pads are exposed and assemblies including the same

#56
20050039944
2005-02-24

Non-solder mask defined (NSMD) type wiring substrate for ball grid array (BGA) package and method for manufacturing such a wiring substrate

#57
14853802
2016-09-13

Flip-chip employing integrated cavity filter, and related components, systems, and methods