209705 ⎘
Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by; Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto; Bump connectors; Manufacturing methods related thereto; Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors Structure
Sub-classes:DUAL INTERFACE SILICON STACK
#2Tall and fine pitch interconnects
#3Semiconductor device and semiconductor device manufacturing method
#4Method for forming bump of semiconductor package
#5Tall and fine pitch interconnects
#6Semiconductor device and semiconductor device manufacturing method
#7Fan out semiconductor device including a plurality of semiconductor die
#8Electrode for a semiconductor device of a ball grid array (BGA) type
#9Stackable molded microelectronic packages
#10Semiconductor device and semiconductor device manufacturing method
#11Semiconductor device having conductive vias
#12Semiconductor structure and manufacturing method thereof
#13Semiconductor structures including carrier wafers and attached device wafers, and methods of forming such semiconductor structures
#14Semiconductor packages
#15Semiconductor package and fabrication method thereof
#16Stackable molded microelectronic packages
#17Semiconductor structures including carrier wafers and methods of using such semiconductor structures
#18Die interconnect
#19Solder stud structure
#20ELECTROLESS NICKEL BUMP OF DIE PAD AND MANUFACTURING METHOD THEREOF
#21Semiconductor structure and manufacturing method thereof
#22Three-dimensional high surface area electrodes
#23SEMICONDUCTOR CHIPS HAVING HEAT CONDUCTIVE LAYER WITH VIAS
#24Stackable molded microelectronic packages
#25Bump electrode, board which has bump electrodes, and method for manufacturing the board
#26Semiconductor devices including unitary supports
#27Semiconductor device
#28Semiconductor package substrates having pillars and related methods
#29Bump structure for stacked dies
#30Microspring structures adapted for target device cooling
#31Planarized bumps for underfill control
#32SEMICONDUCTOR PACKAGES
#33Crack arrest vias for IC devices
#34Stackable molded microelectronic packages
#35Magnetic microelectronic device attachment
#36Semiconductor device and method for manufacturing semiconductor device
#37Method of forming bump structure having tapered sidewalls for stacked dies
#38Contact structure and forming method thereof and connecting structure thereof
#39ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING THE SAME
#40Electronic assembly having a multilayer adhesive structure
#41Structure and method of making sealed capped chips
#42Structure and self-locating method of making capped chips
#43Structure and method of making capped chips having vertical interconnects
#44Back-face and edge interconnects for lidded package
#45Structure and method of making capped chips having vertical interconnects
#46Back-face and edge interconnects for lidded package
#47Structure and method of making capped chips using sacrificial layer
#48Structure and self-locating method of making capped chips
#49Structure and method of making sealed capped chips
#50Structure and method of making capped chips including vertical interconnects having stud bumps engaged to surfaces of said caps
#51Convection optimization for mixed feature electroplating