209841 ⎘
Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by; Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto; Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto; Manufacturing methods by blanket deposition of the material of the layer connector in gaseous form Chemical vapour deposition [CVD], e.g. laser CVD
CAPACITIVE COUPLING IN A DIRECT-BONDED INTERFACE FOR MICROELECTRONIC DEVICES
#2BONDING TECHNIQUES FOR STACKED TRANSISTOR STRUCTURES
#3METHOD OF FORMING SEMICONDUCTOR STRUCTURE
#4SEMICONDUCTOR DEVICES, FABRICATION METHODS THEREOF, AND MEMORY SYSTEMS
#5WAFER BONDING METHOD AND SEMICONDUCTOR STRUCTURE MANUFACTURED USING THE SAME
#6SEMICONDUCTOR PACKAGE
#7Advanced Device Assembly Structures And Methods
#8HEAT DISSIPATION IN SEMICONDUCTOR DEVICES
#9SEMICONDUCTOR PACKAGE
#10BONDING TECHNIQUES FOR STACKED TRANSISTOR STRUCTURES
#11METHOD OF INTERCONNECTING SEMICONDUCTOR DEVICES AND ASSEMBLY OF INTERCONNECTED SEMICONDUCTOR DEVICES
#12Semiconductor Device and Method of Die Attach with Adhesive Layer Containing Graphene-Coated Core
#13INTEGRATED CIRCUIT PACKAGE AND METHOD OF FORMING SAME
#14TANTALUM DOPED RUTHENIUM LAYERS FOR INTERCONNECTS
#15SELF-ALIGNING BONDING BY HYDROPHILIC CONTRAST
#16DIE BACKSIDE METALLIZATION METHODS AND APPARATUS
#17Capacitive coupling in a direct-bonded interface for microelectronic devices
#18SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAME
#19Integrated circuit package and method of forming same
#20SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAME
#21Advanced device assembly structures and methods
#22METHOD OF FORMING SEMICONDUCTOR STRUCTURE
#23SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAME
#24Back side metallization
#25DAM FOR THREE-DIMENSIONAL INTEGRATED CIRCUIT
#26Capacitive coupling in a direct-bonded interface for microelectronic devices
#27Information handling system low form factor interface thermal management
#28Enhanced adhesive materials and processes for 3D applications
#29Contact structures with porous networks for solder connections, and methods of fabricating same
#30SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAME
#31SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAME
#32Back side metallization
#33Semiconductor device and method for manufacturing same
#34Capacitive coupling in a direct-bonded interface for microelectronic devices
#35Ultrathin layer for forming a capacitive interface between joined integrated circuit component
#36Enhanced adhesive materials and processes for 3D applications
#37Dam for three-dimensional integrated circuit
#38Multi-layered composite bonding materials and power electronics assemblies incorporating the same
#39Semiconductor device including built-in crack-arresting film structure
#40Low-temperature bonding with spaced nanorods and eutectic alloys
#41Bonding interface layer
#42Semiconductor device including built-in crack-arresting film structure
#43Ultrathin layer for forming a capacitive interface between joined integrated circuit components
#44Vertically integrated wafers with thermal dissipation
#45Semiconductor device including built-in crack-arresting film structure
#46Wafer to wafer bonding process and structures
#47Low-Temperature Bonding and Sealing With Spaced Nanorods
#48Semiconductor die mount by conformal die coating
#49Method for bonding metallic contact areas with solution of a sacrificial layer applied on one of the contact areas
#50Trap rich layer for semiconductor devices
#51Vertically integrated wafers with thermal dissipation
#52METHOD FOR TERNARY WAFER BONDING AND STRUCTURE THEREOF
#53Dam for three-dimensional integrated circuit
#54Method for coating and bonding substrates
#55Method for bonding substrates
#56Semiconductor chip with electrically conducting layer
#57Methods for the formation of a trap rich layer
#583D integrated heterostructures having low-temperature bonded interfaces with high bonding energy
#59Stacked semiconductor device and method of forming the same related cases
#60Method and apparatus for a wafer seal ring
#61Method for permanently bonding wafers by a connecting layer by means of solid state diffusion or phase transformation
#62Advanced device assembly structures and methods
#63Bonding layer structure and method for wafer to wafer bonding
#64Trap rich layer for semiconductor devices
#65Method of fabricating a TSV for 3D packaging of semiconductor device
#66Method and structure for wafer to wafer bonding in semiconductor packaging
#67Substrate bonding with metal germanium silicon material
#68Low-temperature bonding process
#69Substrate bonding with metal germanium silicon material
#70Semiconductor die mount by conformal die coating
#71Methods of attaching a die to a substrate
#72Back side metallization
#73Back side metallization