210103 ⎘
Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by; Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto; Wire connectors; Manufacturing methods related thereto; Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector Auxiliary members for wire connectors, e.g. flow-barriers, reinforcing structures, spacers, alignment aids
Sub-classes:Straight wirebonding of silicon dies
#2Semiconductor device with active shielding of leads
#3Integrated circuit package system with removable backing element having plated terminal leads and method of manufacture thereof
#4Semiconductor module system having encapsulated through wire interconnect (TWI)
#5Device including a semiconductor chip and wires
#6Semiconductor device stack with bonding layer and wire retaining member
#7Integrated circuit package and method of assembling an integrated circuit package
#8Method for fabricating stacked semiconductor system with encapsulated through wire interconnects (TWI)
#9Integrated circuit package system with removable backing element having plated terminal leads and method of manufacture thereof
#10Semiconductor module system having stacked components with encapsulated through wire interconnects (TWI)
#11ELECTRONIC COMPONENT ASSEMBLY HAVING PROFILED ENCAPSULATED BONDS
#12High density chip stacked package, package-on-package and method of fabricating the same
#13Semiconductor device package having a jumper chip and method of fabricating the same
#14Semiconductor assemblies and methods of manufacturing such assemblies including trench and channel intersects with through-hole in the mold material
#15Method for assembling at least one chip with a wire element, electronic chip with a deformable link element, fabrication method of a plurality of chips, and assembly of at least one chip with a wire element
#16Integrated circuit package system with removable backing element having plated terminal leads and method of manufacture thereof
#17Plastic electronic component package
#18System with semiconductor components having encapsulated through wire interconnects (TWI)
#19Semiconductor device provided with wire that electrically connects printed wiring board and semiconductor chip each other
#20IC PACKAGE DESIGN WITH STRESS RELIEF FEATURE
#21Lens support and wirebond protector
#22Semiconductor device
#23Multi-chip stacked package
#24Assembly of electronic components
#25Semiconductor device stack with bonding layer and wire retaining member
#26Semiconductor device
#27Semiconductor assemblies and methods of manufacturing such assemblies including trenches in a molding material between semiconductor die
#28Method of wire bonding an integrated circuit die and a printed circuit board
#29Semiconductor package which includes an insulating layer located between package substrates which may prevent an electrical short caused by a bonding wire
#30Method for fabricating semiconductor component having encapsulated through wire interconnect (TWI)
#31Lens support and wirebond protector
#32Semiconductor device and manufacturing method for the same
#33Semiconductor package and manufacturing method thereof
#34Power conversion apparatus
#35Manufacturing method of resin-sealed semiconductor device
#36Integrated Circuit, Semiconductor Module and Method for Manufacturing a Semiconductor Module
#37Method of adhering wire bond loops to reduce loop height
#38Electronic device with wire bonds adhered between integrated circuits dies and printed circuit boards
#39Method of forming low profile wire bonds between integrated circuits dies and printed circuit boards
#40Semiconductor assemblies and methods of manufacturing such assemblies including forming trenches in a first side of the molding material
#41SEMICONDUCTOR DEVICE
#42Integrated circuit package system with overhang die
#43Semiconductor device
#44Plastic electronic component package
#45MEMORY DEVICES INCLUDING SEPARATING INSULATING STRUCTURES ON WIRES AND METHODS OF FORMING
#46Packaged integrated circuit
#47Semiconductor chip mounting substrate, semiconductor chip mounting body, semiconductor chip stacked module, and semiconductor chip mounting substrate manufacturing method
#48SEMICONDUCTOR PACKAGE WIRE BONDING
#49Package structure and method for chip with two arrays of bonding pads on BGA substrate for preventing gold bonding wires from collapse
#50Plastic electronic component package
#51Semiconductor chip and method of producing the same
#52Semiconductor package and method of forming wire loop of semiconductor package
#53Semiconductor device and wire bonding method therefor
#54SEMICONDUCTOR MULTI-CHIP PACKAGE AND FABRICATION METHOD
#55Semiconductor device and manufacturing method for the same
#56Die package and probe card structures and fabrication methods
#57Semiconductor device
#58Semiconductor components having encapsulated through wire interconnects (TWI)
#59Stacked integrated circuit package system with connection protection
#60Semiconductor chip package having an adhesive tape attached on bonding wires
#61Semiconductor device
#62BRACE FOR WIRE LOOP
#63METHOD FOR REDUCING OR ELIMINATING SEMICONDUCTOR DEVICE WIRE SWEEP IN A MULTI-TIER BONDING DEVICE AND A DEVICE PRODUCED BY THE METHOD
#64Chip package and wire bonding process thereof
#65Semiconductor device with micro connecting elements and method for producing the same
#66Chip package and producing method thereof
#67Semiconductor chip package having an adhesive tape attached on bonding wires
#68Multi chip package
#69System for reducing or eliminating semiconductor device wire sweep
#70Top finger having a groove and semiconductor device having the same
#71Junction member comprising junction pads arranged in matrix and multichip package using same
#72Method for reducing or eliminating semiconductor device wire sweep in a multi-tier bonding device and a device produced by the method
#73System and method for reducing or eliminating semiconductor device wire sweep