ClassID:

210805

H01L2224/80121 - CPC Classification

Classification description:

Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by; Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding; Aligning Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors

Sub-classes:
Recent Application in this class:
#1
20250379181
2025-12-11

METHOD AND APPARATUS FOR BONDING SUBSTRATES

#2
20250219015
2025-07-03

METHOD OF BONDING CHIPS AND A SYSTEM FOR PERFORMING THE METHOD

#3
20240404987
2024-12-05

METHOD AND DEVICE FOR MANUFACTURING STACKED SUBSTRATE

#4
20220045030
2022-02-10

Bonding apparatus and bonding method

#5
20210343862
2021-11-04

Methods and devices for fabricating and assembling printable semiconductor elements

#6
20210082896
2021-03-18

Semiconductor storage device including first pads on a first chip that are bonded to second pads on a second chip

#7
20200381316
2020-12-03

Connectivity detection for wafer-to-wafer alignment and bonding

#8
20200335543
2020-10-22

Semiconductor device and imaging device

#9
20200303359
2020-09-24

Process for manufacturing an LED-based emissive display device

#10
20200286851
2020-09-10

Method and device for manufacturing stacked substrate

#11
20200027868
2020-01-23

Hybrid bonding with through substrate via (TSV)

#12
20200006540
2020-01-02

Methods and devices for fabricating and assembling printable semiconductor elements

#13
20190378799
2019-12-12

Method for arranging two substrates

#14
20190296073
2019-09-26

Semiconductor device and imaging device

#15
20190198471
2019-06-27

Location displacement detection method, location displacement detection device, and display device

#16
20190148263
2019-05-16

Clip for semiconductor package

#17
20190051628
2019-02-14

Hybrid bonding systems and methods for semiconductor wafers

#18
20180254267
2018-09-06

Method of manufacturing a semiconductor device

#19
20180138223
2018-05-17

Semiconductor device and imaging device

#20
20180068965
2018-03-08

Conductive pad structure for hybrid bonding and methods of forming same

#21
20170358551
2017-12-14

Hybrid bonding systems and methods for semiconductor wafers

#22
20170309733
2017-10-26

Methods and devices for fabricating and assembling printable semiconductor elements

#23
20170047260
2017-02-16

Apparatus and method for verification of bonding alignment

#24
20160343679
2016-11-24

Conductive pad structure for hybrid bonding and methods of forming same

#25
20160293794
2016-10-06

Methods and devices for fabricating and assembling printable semiconductor elements

#26
20160284544
2016-09-29

Methods and devices for fabricating and assembling printable semiconductor elements

#27
20150357296
2015-12-10

Hybrid bonding mechanisms for semiconductor wafers

#28
20150287694
2015-10-08

Hybrid bonding systems and methods for semiconductor wafers

#29
20150255444
2015-09-10

Semiconductor device, method of manufacturing a semiconductor device, and positioning jig

#30
20150228535
2015-08-13

Bonded processed semiconductor structures and carriers

#31
20150179605
2015-06-25

Method for aligning micro-electronic components

#32
20150171050
2015-06-18

Conductive pad structure for hybrid bonding and methods of forming same

#33
20140256087
2014-09-11

Hybrid bonding and apparatus for performing the same

#34
20140191236
2014-07-10

Methods and devices for fabricating and assembling printable semiconductor elements

#35
20140117546
2014-05-01

Hybrid bonding mechanisms for semiconductor wafers

#36
20140011324
2014-01-09

Hybrid bonding systems and methods for semiconductor wafers

#37
20130256907
2013-10-03

Bonded processed semiconductor structures and carriers

#38
20130252375
2013-09-26

Magnet assisted alignment method for wafer bonding and wafer level chip scale packaging

#39
20120187530
2012-07-26

Using backside passive elements for multilevel 3D wafers alignment applications

#40
20120153484
2012-06-21

Methods for directly bonding together semiconductor structures, and bonded semiconductor structures formed using such methods

#41
20120013013
2012-01-19

Methods of forming bonded semiconductor structures using a temporary carrier having a weakened ion implant region for subsequent separation along the weakened region

#42
20110220890
2011-09-15

Methods and devices for fabricating and assembling printable semiconductor elements

#43
20100072577
2010-03-25

Methods and devices for fabricating and assembling printable semiconductor elements

#44
20090294803
2009-12-03

Methods and devices for fabricating and assembling printable semiconductor elements

#45
20060038182
2006-02-23

Stretchable semiconductor elements and stretchable electrical circuits

#46
15814670
2019-02-12

Clip for semiconductor package