ClassID:

211141

H01L2224/82104 - CPC Classification

Classification description:

Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by; Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]; Forming a build-up interconnect by additive methods, e.g. direct writing using screen printing

Recent Application in this class:
#1
20240008298
2024-01-04

LIGHT EMITTING DIODE DISPLAY WITH REDUNDANCY SCHEME

#2
20220352108
2022-11-03

Circuits including micropatterns and using partial curing to adhere dies

#3
20220293876
2022-09-15

Light emitting diode display with redundancy scheme

#4
20220181291
2022-06-09

Method for contacting and packetising a semiconductor chip

#5
20210257572
2021-08-19

Light emitting diode display with redundancy scheme

#6
20210175195
2021-06-10

Interconnect Structure for High Power GaN Module

#7
20200357706
2020-11-12

Aligning component carrier structure with known-good sections and critical section with other component carrier with components and dummies

#8
20200013975
2020-01-09

Light emitting diode display with redundancy scheme

#9
20180132347
2018-05-10

Printing complex electronic circuits using a printable solution defined by a patterned hydrophobic layer

#10
20180102492
2018-04-12

Light emitting diode display with redundancy scheme

#11
20180092215
2018-03-29

Circuit structure

#12
20180012873
2018-01-11

System and method for the fluidic assembly of micro-LEDs utilizing negative pressure

#13
20170135214
2017-05-11

Printing complex electronic circuits using a patterned hydrophobic layer

#14
20170125372
2017-05-04

Method for forming complex electronic circuits by interconnecting groups of printed devices

#15
20160276258
2016-09-22

Semiconductor device and method of forming an embedded SoP fan-out package

#16
20160099226
2016-04-07

Circuit substrate interconnect

#17
20150318328
2015-11-05

Light emitting diode display with redundancy scheme

#18
20150303177
2015-10-22

Three-terminal printed devices interconnected as circuits

#19
20150064844
2015-03-05

Multichip power semiconductor device

#20
20150044824
2015-02-12

Method for manufacturing a fan-out WLP with package

#21
20140268591
2014-09-18

Printing complex electronic circuits

#22
20140267683
2014-09-18

Method of fabricating a light emitting diode display with integrated defect detection test

#23
20140264460
2014-09-18

Three-terminal printed devices interconnected as circuits

#24
20140167275
2014-06-19

Embedded package and method of manufacturing the same

#25
20140124962
2014-05-08

Integrated circuit package including wire bond and electrically conductive adhesive electrical connections

#26
20140069697
2014-03-13

Method and apparatus for assembling electric components on a flexible substrate as well as assembly of an electric component with a flexible substrate

#27
20140054780
2014-02-27

Method for manufacturing an electronic module and an electronic module

#28
20140001615
2014-01-02

Package-in-packages and methods of formation thereof

#29
20130341784
2013-12-26

Semiconductor device and method of forming an embedded SOP fan-out package

#30
20130283599
2013-10-31

Making electronic storage system having code circuit

#31
20130277824
2013-10-24

Semiconductor device including a polymer disposed on a carrier

#32
20130256856
2013-10-03

Multichip power semiconductor device

#33
20130154110
2013-06-20

Direct write interconnections and method of manufacturing thereof

#34
20130105989
2013-05-02

Semiconductor device and method of forming interposer frame over semiconductor die to provide vertical interconnect

#35
20130056749
2013-03-07

BROAD-AREA LIGHTING SYSTEMS

#36
20130032944
2013-02-07

Microelectronic package with stacked microelectronic elements and method for manufacture thereof

#37
20120313253
2012-12-13

Fan-out microelectronic unit WLP having interconnects comprising a matrix of a high melting point, a low melting point and a polymer material

#38
20120091581
2012-04-19

Package unit and stacking structure thereof

#39
20120081868
2012-04-05

Electronic assemblies and methods of forming electronic assemblies

#40
20120056329
2012-03-08

Semiconductor device and method of forming interposer frame over semiconductor die to provide vertical interconnect

#41
20100207227
2010-08-19

Electronic Device and Method of Manufacturing Same

#42
20080242004
2008-10-02

Inkjet printed wirebonds, encapsulant and shielding

#43
20060267200
2006-11-30

Method of making an electronic device using an electrically conductive polymer, and associated products