207721 ⎘
Details of semiconductor or other solid state devices; Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
SELF-CONFIGURING CONTACT ARRAYS FOR INTERFACING WITH ELECTRIC CIRCUITS AND FABRIC CARRIERS
#2FABRICATION METHODS OF 3D SEMICONDUCTOR DEVICES AND STRUCTURES WITH METAL LAYERS AND CONNECTION PATH
#3High-Isolation P-Substrate on RF PMOS
#4SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
#5MULTI-LAYER CIRCUIT BOARD HAVING STIMULUS-RESPONSIVE STRAIN LAYER
#6MEMORY ARRAY DECODING AND INTERCONNECTS
#7Power Electronic Assemblies
#8SEMICONDUCTOR DEVICE HAVING STACKED CHIPS
#9SEMICONDUCTOR PACKAGING METHOD, SEMICONDUCTOR PACKAGE AND ELECTRONIC DEVICE
#10INTEGRATED CIRCUIT DEVICE AND SYSTEM
#11COOLING ARRANGEMENT FOR A BACKSIDE POWER DELIVERY NETWORK
#12SEMICONDUCTOR DEVICE
#13SEMICONDUCTOR DEVICE AND METHOD FOR OPERATING THE SAME
#14STIFFENER STRUCTURE WITH BEVELED SIDEWALL FOR FOOTPRINT REDUCTION AND METHODS FOR FORMING THE SAME
#15DUAL INTERFACE SILICON STACK
#16SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
#17PASSIVATION SCHEME FOR PAD OPENINGS AND TRENCHES
#18SEMICONDUCTOR DEVICE AND VEHICLE
#19PATTERNED DEEP TRENCH ISOLATION FOR PASSIVE DEVICES
#20INTEGRATED CIRCUIT DEVICE LAYOUT, SYSTEM AND METHOD
#213D CHIP SHARING DATA BUS
#22HIGH DENSITY SUBSTRATE ROUTING IN PACKAGE
#23HIGH DENSITY SUBSTRATE ROUTING IN PACKAGE
#24HIGH DENSITY SUBSTRATE ROUTING IN PACKAGE
#25TEST METHODOLOGY FOR ANALOG PHYSICAL LAYER MODULE IN SEMICONDUCTOR DIE
#26SEMICONDUCTOR DEVICE INCLUDING STANDARD CELLS WITH COMBINED ACTIVE REGION
#27COMPOSITION AND METHOD FOR POLISHING AND INTEGRATED CIRCUIT
#28POWER RAIL IN STACKED FET DEVICES
#29CELL STRUCTURES AND POWER ROUTING FOR INTEGRATED CIRCUITS
#30MIXED HEIGHT CONTACTS FOR STRATEGIC ENABLING OF HIGH-SPEED SYSTEMS THROUGH A SOCKET USING AN INTERCONNECT LAYER
#31PACKAGES WITH METAL LINE CRACK PREVENTION DESIGN
#32DUAL-SIDE POWER RAIL DESIGN AND METHOD OF MAKING SAME
#33INTEGRATED CIRCUIT, SYSTEM AND METHOD OF FORMING THE SAME
#34INTEGRATION OF A PASSIVE COMPONENT IN A CAVITY OF AN INTEGRATED CIRCUIT PACKAGE
#35SEMICONDUCTOR DEVICE
#36DIE INTERCONNECT SUBSTRATE, AN ELECTRICAL DEVICE AND A METHOD FOR FORMING A DIE INTERCONNECT SUBSTRATE
#37CHOKE FILTERS IMPLEMENTED USING SUBSTRATE MATERIALS
#38SEMICONDUCTOR POWER MODULE, MOTOR CONTROLLER, AND VEHICLE
#39INTEGRATED CIRCUIT PACKAGE POWER STRUCTURE
#40POWER RAIL LEAD FOR SEMICONDUCTOR STRUCTURES
#41LIDDED ELECTRONIC PACKAGE CONTAINING A BATTERY
#42INTEGRATED CIRCUIT DEVICES
#43COMPUTING SYSTEM ARCHITECTURE HAVING EFFICIENT BUS CONNECTIONS
#44INTERPOSER INCLUDING INDUCTOR DEVICES
#45THREE-LEVEL POWER MODULE
#46STACKED IC STRUCTURE WITH ORTHOGONAL INTERCONNECT LAYERS
#47ENABLING MM-WAVE AESAS USING ADVANCED PACKAGING
#48Wafer Level Integration of Passive Devices
#49ELECTRONIC COMPONENTS FOR SOFT, FLEXIBLE CIRCUITRY LAYERS AND METHODS THEREFOR
#50Stacked Semiconductor Device Assembly in Computer System
#51Integrated Circuit Device
#52Multi-Die Fine Grain Integrated Voltage Regulation
#533D CHIP WITH SHARED CLOCK DISTRIBUTION NETWORK
#54SEMICONDUCTOR DEVICE WITH COUPLER STRUCTURE
#55MICROELECTRONIC ASSEMBLIES HAVING TOPSIDE POWER DELIVERY STRUCTURES
#56SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
#57SEMICONDUCTOR CHIP INCLUDING CHIP GUARD STRUCTURE AND UPPER GUARD LINE DISPOSED SPACED APART FROM EACH OTHER
#58Buffer and Inverter Transistors Embedded in Interconnect Metal Layers
#59CANTILEVERED POWER PLANES TO PROVIDE A RETURN CURRENT PATH FOR HIGH-SPEED SIGNALS
#60POWER MODULE AND METHOD OF FABRICATING THE SAME
#61SEMICONDUCTOR DEVICE
#62SEMICONDUCTOR DEVICE
#63SIGNAL ISOLATION FOR MODULE WITH BALL GRID ARRAY
#64Semiconductor Device and Method of Integrating eWLB with E-bar Structures and RF Antenna Interposer
#65POWER AMPLIFIER SYSTEMS INCLUDING CONTROL INTERFACE AND WIRE BOND PAD
#66VERTICAL METAL SPLITTING USING HELMETS AND WRAP-AROUND DIELECTRIC SPACERS
#67Multi-Die Fine Grain Integrated Voltage Regulation
#68QUANTUM DEVICE AND QUANTUM DEVICE MANUFACTURING METHOD
#69POWER MANAGEMENT INTEGRATED CIRCUIT WITH BLEED CIRCUIT CONTROL
#70BACKSIDE CONTACT BASED DIE EDGE GUARD RINGS
#71MIM Capacitor in IC Heterogenous Integration
#72SEMICONDUCTOR DEVICE
#73HEADER LAYOUT DESIGN INCLUDING BACKSIDE POWER RAIL
#74INTEGRATED CIRCUIT HAVING STACKED PICK-UP REGIONS
#75INTEGRATED CIRCUIT IN HYBRID ROW HEIGHT STRUCTURE
#76INTEGRATED CIRCUIT DEVICE INCLUDING A POWER SUPPLY LINE AND METHOD OF FORMING THE SAME
#77Backside Interconnect Structures for Semiconductor Devices and Methods of Forming the Same
#78PACKAGE WITH EMBEDDED TRACES
#79System on Chip (SOC) Current Profile Model for Integrated Voltage Regulator (IVR) Co-design
#80STRUCTURE AND FORMATION METHOD OF INTEGRATED CHIPS PACKAGE WITH CAPACITOR
#813D SEMICONDUCTOR DEVICE AND STRUCTURE WITH CONNECTION PATHS
#82METHODS FOR MANUFACTURING SEMICONDUCTOR STRUCTURE
#83INTEGRATED CHIP HAVING A BACK-SIDE POWER RAIL
#843D SEMICONDUCTOR DEVICE AND STRUCTURE WITH THREE LEVELS AND ISOLATION LAYERS
#85INTEGRATED CIRCUITS WITH BACKSIDE POWER RAILS
#86SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
#87CONNECTING SYSTEM AND ELECTRICAL CONNECTOR FOR CHIP MODULE
#88INTEGRATED CIRCUIT STRUCTURE WITH FRONT SIDE SIGNAL LINES AND BACKSIDE POWER DELIVERY
#89SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND SEMICONDUCTOR PACKAGE STRUCTURE
#90POWER DELIVERY STRUCTURES
#91ELECTRONIC DEVICE
#92OVER AND UNDER INTERCONNECTS
#93BONDING LAYER BETWEEN STACKED INTEGRATED CIRCUITS
#94HIGH DENSITY SUBSTRATE ROUTING IN PACKAGE
#95Chip Die Substrate with Edge-Mounted Capacitors
#96INTEGRATED CIRCUIT DEVICE
#97INTEGRATED CIRCUIT DEVICE AND METHOD
#98SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF
#99SEMICONDUCTOR DEVICE IN HYBRID ROW HEIGHT STRUCTURE
#100PROCESSOR PACKAGE SUBSTRATE WITH HIGH-SPEED TOP-SURFACE CONNECTION TO CABLE INTERCONNECT
#101VOLTAGE REGULATOR MODULE HAVING A POWER STAGE
#102LAMINATED STRUCTURE AND SEMICONDUCTOR ELEMENT
#103METHOD AND IC DESIGN WITH NON-LINEAR POWER RAILS
#104SEMICONDUCTOR DEVICE INCLUDING STANDARD CELL HAVING SPLIT PORTIONS
#105ELECTRONIC DEVICE
#106LOAD PLATE WITH FEEDTHROUGH
#107SEMICONDUCTOR CHIP INCLUDING THROUGH ELECTRODES, AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME
#108SEMICONDUCTOR POWER MODULE, ELECTRIC MOTOR CONTROLLER AND VEHICLE
#109PASSIVE COMPONENT MODULE
#110PASSIVATION SCHEME FOR PAD OPENINGS AND TRENCHES
#111ELECTRONIC PACKAGE
#112SEMICONDUCTOR SUBSTRATE ASSEMBLY AND MANUFACTURING METHOD THEREFOR
#113RESONANT INDUCTIVE-CAPACITIVE ISOLATED DATA CHANNEL
#1143D chip sharing data bus
#115INTERCONNECTION STRUCTURE FOR INTEGRATED CIRCUIT PACKAGE
#116ACTIVE BRIDGING APPARATUS
#117Stacked IC structure with orthogonal interconnect layers
#118INTEGRATED CIRCUIT INCLUDING SWITCH CELL AREA
#119SEMICONDUCTOR DEVICE HAVING ELECTRODE PADS ARRANGED BETWEEN GROUPS OF EXTERNAL ELECTRODES
#120POWER DEVICE MODULE WITH DUMMY PAD DIE LAYOUT
#121FORK SHEET DEVICE WITH WRAPPED SOURCE AND DRAIN CONTACT TO PREVENT NFET TO PFET CONTACT SHORTAGE IN A TIGHT SPACE
#122Integrated Circuit Device and a Method for Forming the Same
#123SEMICONDUCTOR DEVICE WITH POWER SUPPLY DISTRIBUTION NETWORKS ON FRONTSIDE AND BACKSIDE OF A CIRCUIT
#124SEMICONDUCTOR PACKAGE AND METHOD
#125MEMORY ARRAY DECODING AND INTERCONNECTS
#126SEMICONDUCTOR MODULE
#127Photonic wafer communication systems and related packages
#128PROCESS MONITORING STRUCTURES FOR VIA ETCH PROCESSES FOR SEMICONDUCTOR DEVICES
#129Integrated Fan-Out Packages with Embedded Heat Dissipation Structure
#130SEMICONDUCTOR DEVICE HAVING ELECTRODE PADS ARRANGED BETWEEN GROUPS OF EXTERNAL ELECTRODES
#1313D semiconductor device and structure with metal layers and a connective path
#132Semiconductor Device with Discrete Blocks
#133SEMICONDUCTOR DEVICE HAVING ROUTING STRUCTURE
#134INTEGRATED ELECTRONIC STRUCTURE AND DATA COMMUNICATION BETWEEN COMPONENTS OF THE STRUCTURE
#135Die interconnect substrate, an electrical device and a method for forming a die interconnect substrate
#136SEMICONDUCTOR STRUCTURE AND LAYOUT STRUCTURE
#137LOW TEMPERATURE CAPACITIVELY COUPLED DEVICE FOR LOW NOISE CIRCUITS
#138Signal routing in integrated circuit packaging
#139Stacked semiconductor device assembly in computer system
#140SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
#141SIGNAL PROCESSING BOARD AND IMAGE FORMING APPARATUS
#142Integrated circuit device including a power supply line and method of forming the same
#143POWER CONVERTER WITH AT LEAST TWO POWER SEMICONDUCTOR MODULES
#144PACKAGES WITH METAL LINE CRACK PREVENTION DESIGN
#145POWER CONTROL APPARATUS
#146STACKED INTEGRATED CIRCUIT (IC) PACKAGE
#147METHODS OF SEPARATING SEMICONDUCTOR DIES
#148SEMICONDUCTOR CHIP AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME
#149CELL STRUCTURES AND POWER ROUTING FOR INTEGRATED CIRCUITS
#150INTEGRATED CIRCUIT DEVICE
#151THREE-DIMENSIONAL INTEGRATED CIRCUIT MODULE AND FABRICATION METHOD THEREFOR
#152ELECTRONIC DEVICE
#153INTEGRATED CIRCUIT IN HYBRID ROW HEIGHT STRUCTURE
#154High density substrate routing in package
#155FLEXIBLE ELECTRONIC CIRCUITS WITH SUPPORT STRUCTURES
#156Electronic components for soft, flexible circuitry layers and methods therefor
#157System on chip (SOC) current profile model for integrated voltage regulator (IVR) co-design
#158INTERPOSER WITH CONTACT RETENTION WITH HEAT STAKE
#159GATE-ALL-AROUND TRANSISTOR CIRCUIT MODIFICATION USING DIRECT CONTACT AND/OR ACCESS PROBE POINTS
#160Semiconductor package having smart power stage and E-fuse solution
#161PACKAGE WITH EMBEDDED CAPACITORS
#162Power distribution method
#163Header layout design including backside power rail
#164STIFFENER STRUCTURE WITH BEVELED SIDEWALL FOR FOOTPRINT REDUCTION AND METHODS FOR FORMING THE SAME
#165INTEGRATED CIRCUIT IN HYBRID ROW HEIGHT STRUCTURE
#166INLINE CIRCUIT EDIT FOR BACKSIDE POWER DELIVERY WITH DEEP VIA
#167Integrated circuits with backside power rails
#168Cantilevered power planes to provide a return current path for high-speed signals
#169SEMICONDUCTOR DEVICE INCLUDING STANDARD CELL HAVING SPLIT PORTIONS
#170POWER REGULATOR INTERFACES FOR INTEGRATED CIRCUITS
#171METHODS AND SYSTEMS FOR MATCHING BOTH DYNAMIC AND STATIC PARAMETERS IN DIES, DISCRETES, AND/OR MODULES AND METHODS AND SYSTEMS BASED ON THE SAME
#172SEMICONDUCTOR MODULE
#173Integrated chip having a back-side power rail
#1743D semiconductor device and structure with metal layers and a connective path
#175CERAMIC SUBSTRATE AND CERAMIC DIVIDED SUBSTRATE
#176Integrated circuit, system and method of forming the same
#177Systems And Methods For Selecting Decoupling Capacitance Using A Power Jumper Circuit
#178System-Level Power Distribution, Optical Signal Distribution, and Thermal Cooling for High Bandwidth Communication
#179SEMICONDUCTOR DEVICE INCLUDING STANDARD CELLS WITH COMBINED ACTIVE REGION
#180SEMICONDUCTOR DEVICE, ELECTRONIC DEVICE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
#181PJ JUNCTION DEVICE STRUCTURE IN SEMICONDUCTOR DEVICE WITH BACK SIDE POWER DELIVERY NETWORK (BSPDN) STRUCTURE
#182Semiconductor module
#183Electronic device
#184Semiconductor device including frontside power mesh and backside power mesh and manufacturing method thereof
#185Semiconductor package and method
#186Electronic package
#1873D semiconductor device and structure with metal layers and a connective path
#188VERTICALLY INTEGRATED SEMICONDUCTOR DEVICE
#189Semiconductor integrated circuit device and semiconductor package structure
#190Head and printer
#191HIGH BANDWIDTH AND CAPACITY APPROACHES FOR STITCHED DIES
#1923D semiconductor device and structure with metal layers and a connective path
#193Terminal Member, Assembly, Semiconductor Device, and Methods for Manufacturing Same
#194Method and IC design with non-linear power rails
#195Tiling device including substrates and data driving circuit
#196SEMICONDUCTOR DEVICE
#197CELL HAVING STACKED PICK-UP REGION
#198Die interconnect substrate, an electrical device and a method for forming a die interconnect substrate
#199SEMICONDUCTOR APPARATUS
#2003D chip with shared clock distribution network
#201Backside metal-insulator-metal (MIM) capacitors extending through backside interlayer dielectric (BILD) layer or semiconductor layer and partly through dielectric layer
#202TRUE POWER SHEDDING APPARATUS AND METHOD TO REDUCE POWER CONSUMPTION
#203Semiconductor device and method of manufacturing the same
#204SWITCHING POWER MODULE AND COMMUNICATIONS DEVICE
#205Memory array decoding and interconnects
#206Stiffener ring combined with ASIC power delivery
#207CAPACITOR STRUCTURE TO SUPPORT VARIABLE SIGNAL AMPLITUDES IN AN ISOLATOR PRODUCT
#208Integrated circuit package module including a bonding system
#209COOLING OF CONFORMAL POWER DELIVERY STRUCTURES
#210Integrating voltage regulators and passive circuit elements with top side power planes in stacked die architectures
#211CONFORMAL POWER DELIVERY STRUCTURES NEAR HIGH-SPEED SIGNAL TRACES
#212GLASS SUBSTRATES HAVING PARTIALLY EMBEDDED CONDUCTIVE LAYERS FOR POWER DELIVERY IN SEMICONDUCTOR PACKAGES AND RELATED METHODS
#213Semiconductor device with spaced apart containers
#2143D semiconductor device and structure with metal layers and a connective path
#215SEMICONDUCTOR DEVICE
#216Semiconductor device
#217Integrated circuit device and method
#218Semiconductor structure and method for manufacturing thereof
#219SEMICONDUCTOR APPARATUS AND MANUFACTURING METHOD FOR SEMICONDUCTOR APPARATUS
#220ELECTRO-STATIC DISCHARGE PROTECTION DEVICE FOR SEMICONDUCTOR
#221INTEGRATED CIRCUIT INTERCONNECT TECHNIQUES
#222Integrated chip having a back-side power rail
#223Resonant inductive-capacitive isolated data channel
#224Electronic device comprising a chip and at least one SMT electronic component
#225MEMORY ON PACKAGE (MOP) WITH REVERSE CAMM (COMPRESSION ATTACHED MEMORY MODULE) AND CMT CONNECTOR
#226Passivation scheme for pad openings and trenches
#2273D semiconductor device and structure with metal layers and a connective path
#228CONTROLLED ELECTROSTATIC DISCHARGING TO AVOID LOADING ON INPUT/OUTPUT PINS
#229Signal delivery in stacked device
#230Microelectronic assemblies having topside power delivery structures
#231MICROELECTRONIC ASSEMBLIES HAVING TOPSIDE POWER DELIVERY STRUCTURES
#232INTEGRATION OF A PASSIVE COMPONENT IN A CAVITY OF AN INTEGRATED CIRCUIT PACKAGE
#233INTERCONNECTION STRUCTURE FOR INTEGRATED CIRCUIT PACKAGE AND THE METHOD THEREOF
#234Power amplifier modules including semiconductor resistor and tantalum nitride terminated through wafer via
#235Semiconductor device including standard cell having split portions
#236Plurality of bus bars intersecting a plurality electrode
#237SEMICONDUCTOR DEVICE
#238Display Panel, Display Backplane and Manufacturing Method of Display Backplane
#239Backside interconnect structures for semiconductor devices and methods of forming the same
#240Finger-type semiconductor capacitor array layout
#241ANTENNA DIODE CIRCUIT
#242Cell having stacked pick-up region
#243Integrated circuit package with heatsink
#244Semiconductor package with layer structures, antenna layer and electronic component
#245Integrated circuits with backside power rails
#246Semiconductor structures
#247Semiconductor device
#2483D semiconductor device and structure with metal layers
#249Power module
#250Semiconductor device having electrode pads arranged between groups of external electrodes
#251Semiconductor device and method of manufacture
#252Display device and fabrication method of the same having a boots layer
#253Dual-Side Power Rail Design and Method of Making Same
#254Header layout design including backside power rail
#255Wafer Level Integration of Passive Devices
#256Three-level power module
#257Stacked semiconductor device assembly in computer system
#258Integrated circuit device, device, and manufacturing method
#259Partially Staggered Ball Array for Reduced Noise Injection
#260Power component configured for improving partial discharge performance and system and process of implementing the same
#261Power supply device for avoiding data transmission conflict
#262SYSTEM ON CHIP AND ELECTRONIC SYSTEM INCLUDING THE SAME
#263Integrated circuit in hybrid row height structure
#264Semiconductor device and integrated circuit in hybrid row height structure
#265Electronic components for soft, flexible circuitry layers and methods therefor
#266Inverter module and inverter
#267Integrated circuit structure with front side signal lines and backside power delivery
#268Power semiconductor module having a current sensor module fixed with potting material
#269ISOLATING ELECTRIC PATHS IN SEMICONDUCTOR DEVICE PACKAGES
#270Semiconductor device
#271Packaged module with ball grid array and grounding pins for signal isolation, method of manufacturing the same, and wireless device comprising the same
#272Signal routing in integrated circuit packaging
#273EMI shielding for flip chip package with exposed die backside
#274Semiconductor module
#275Integrated circuit, system and method of forming the same
#276Semiconductor device and power conversion device
#277Planar power module with high power density packaging
#278Apparatus and method for direct power delivery to integrated circuit package
#279Semiconductor chip including through electrodes, and semiconductor package including the same
#280Semiconductor package having smart power stage and e-fuse solution
#281Compositions of influenza hemagglutinin with heterologous epitopes and/or altered maturation cleavage sites and methods of use thereof
#282Power-forwarding bridge for inter-chip data signal transfer
#283Resonant inductive-capacitive isolated data channel
#284Semiconductor arrangements
#285SELF-ALIGNED LOW RESISTANCE BURIED POWER RAIL THROUGH SINGLE DIFFUSION BREAK DUMMY GATE
#286Systems and apparatuses for implementing a pad on solder mask (POSM) semiconductor substrate package
#287CONNECTION SYSTEM AND METHOD FOR AN OPTIMIZED JOINING PROCESS OF BUSBARS
#288Vertical metal splitting using helmets and wrap-around dielectric spacers
#289Connection of several circuits of an electronic chip
#290Three-dimensional memory device containing a shared word line driver across different tiers and methods for making the same
#291ORGANIC LIGHT EMITTING DIODE DISPLAY DEVICE
#292High density substrate routing in package
#293Semiconductor device
#294Semiconductor device
#295Semiconductor device with discrete blocks
#296SEMICONDUCTOR DEVICE, MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE, ELECTRONIC COMPONENT, CIRCUIT SUBSTRATE, AND ELECTRONIC APPARATUS
#297HIGH SPEED, HIGH DENSITY, LOW POWER DIE INTERCONNECT SYSTEM
#298Semiconductor device and manufacturing method thereof
#299Integrated circuit including asymmetric power line and method of designing the same
#300Power management integrated circuit with bleed circuit control