208009 ⎘
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
Method to form a 3D integrated circuit
#602Transient stabilized SOI FETs
#603Dual-gate transistors and their integrated circuits and preparation method thereof
#604Semiconductor device and manufacturing method of the same
#605Method and apparatus improving gate oxide reliability by controlling accumulated charge
#606Low parasitic capacitance RF transistors
#6073D SEMICONDUCTOR DEVICE AND STRUCTURE
#608High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency
#609Semiconductor device and method for fabricating the same
#610AC coupling modules for bias ladders
#611Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction
#612Wafer scale bonded active photonics interposer
#613Logic drive based on standard commodity FPGA IC chips using non-volatile memory cells
#614SEMICONDUCTOR DEVICE
#615Floating body memory cell having gates favoring different conductivity type regions
#616Tiled lateral thyristor
#617Co-integration of bulk and SOI transistors
#618Semiconductor device
#619Butted body contact for SOI transistor
#620Complementary transistor and semiconductor device
#621Devices and methods for improving voltage handling and/or bi-directionality of stacks of elements when connected between terminals
#622OTP-MTP on FDSOI architecture and method for producing the same
#623Method for forming a bulk semiconductor substrate configured to exhibit soi behavior
#624Ultra low parasitic inductance integrated cascode GaN devices
#625Semiconductor structure and method for forming the same
#626Field effect transistor with decoupled channel and methods of manufacturing the same
#627SOI wafers and devices with buried stressor
#628Apparatus, system and method of an electrostatically formed nanowire (EFN)
#629Display panel, method for manufacturing the same, and display device
#630Method of manufacturing a semiconductor device and a semiconductor device
#631Semiconductor on insulator structure comprising a plasma nitride layer and method of manufacture thereof
#632PRODUCTION OF SEMICONDUCTOR REGIONS IN AN ELECTRONIC CHIP
#633Simplified memory cells based on fully-depleted silicon-on-insulator transistors
#634DENSE ARRAYS AND CHARGE STORAGE DEVICES
#635Semiconductor device integrating silicon-based device with semiconductor-based device and method for fabricating the same
#636Amplitude-phase canceling circuit for switch linearity
#637INVERSION MODE GATE-ALL-AROUND NANO-SHEET COMPLEMENTARY INVERTER AND METHOD OF MAKING THE SAME
#638Vertical field effect transistor including integrated antifuse
#639Main-auxiliary field-effect transistor configurations with interior parallel transistors
#640Silicon and silicon germanium nanowire structures
#641Integrated circuit with resurf region biasing under buried insulator layers
#642Integrated circuit chip, integrated circuit package and display apparatus including the integrated circuit chip
#643Semiconductor device having a radio frequency circuit and a method for manufacturing the semiconductor device
#644Device substrate with high thermal conductivity and method of manufacturing the same
#645Efficient heat-sinking in PIN diode
#646Semiconductor structure and manufacturing method thereof
#647Capacitance balance in dual sided contact switch
#648Semiconductor structure and manufacturing method thereof
#649Semiconductor structure and manufacturing method thereof
#650Independently controlled main-auxiliary branch configurations for radio frequency applications
#651Integrated circuit with multiple gallium nitride transistor sets
#652SEMICONDUCTOR DEVICES AND METHODS FOR FABRICATING THE SAME
#653Buried local interconnect
#654Nanofluid sensor with real-time spatial sensing
#655Logic drive based on standard commodity FPGA IC chips using non-volatile memory cells
#656Strained semiconductor using elastic edge relaxation of a stressor combined with buried insulating layer
#657Semiconductor device
#658Nonvolatile memory device having a memory-transistor gate-electrode provided with a charge-trapping gate-dielectric layer and two sidewall select-transistor gate-electrodes
#659Isolation cavities in semiconductor devices
#660Flipped vertical field-effect-transistor
#661METHOD OF MAKING BREAKDOWN RESISTANT SEMICONDUCTOR DEVICE
#662Managed substrate effects for stabilized SOI FETs
#663Switch branch structure
#664Radio-frequency isolation using backside cavities
#665Fabrication of a pair of vertical fin field effect transistors having a merged top source/drain
#666Fabrication of a pair of vertical fin field effect transistors having a merged top source/drain
#667Fabrication of a pair of vertical fin field effect transistors having a merged top source/drain
#668DC-coupled high-voltage level shifter
#669SOI semiconductor structure and method for manufacturing an SOI semiconductor structure
#670SOI substrate compatible with the RFSOI and FDSOI technologies
#671Structures and methods for trench isolation
#672Nonvolatile nanotube switch elements using sidewall contacts
#673Switch resistor networks
#674Positive logic switch with selectable DC blocking circuit
#675STANDARD CELL HAVING MIXED FLIP-WELL AND CONVENTIONAL WELL TRANSISTORS
#676Production of semiconductor regions in an electronic chip
#677Systems and method for integrated devices on an engineered substrate
#678CMOS compatible BioFET
#679Integrated circuit components with substrate cavities
#680Three-dimensional (3D), vertically-integrated field-effect transistors (FETs) for complementary metal-oxide semiconductor (CMOS) cell circuits
#681Transistor structure in low noise amplifier
#682Connection arrangements for integrated lateral diffusion field effect transistors having a backside contact
#683III-V CMOS co-integration
#684Formation of stacked nanosheet semiconductor devices
#685IMAGE SENSOR AND ELECTRONIC CAMERA
#686Self-aligned gate cut in direct stacked vertical transport field effect transistor (VTFET)
#687MOSFET and memory cell having improved drain current through back bias application
#688Semiconductor device from transferring programs from a ROM to an SRAM
#689Dummy gate isolation and method of production thereof
#690Method of depositing charge trapping polycrystalline silicon films on silicon substrates with controllable film stress
#691High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency
#692Semiconductor on insulator structure comprising a buried high resistivity layer
#693Semiconductor device
#694Lateral MOSFET with dielectric isolation trench
#695Method for manufacturing a transistor having a sharp junction by forming raised source-drain regions before forming gate regions and corresponding transistor produced by said method
#696Enhanced bonding between III-V material and oxide material
#697Apparatus and method for integrating self-test oscillator with injection locked buffer
#698Epitaxial semiconductor material grown with enhanced local isotropy
#699Gate-all-around gradient-doped nano-sheet complementary inverter and method of making the same
#700Stacked field-effect transistors having proximity electrodes
#701Integrated ESD enhancement circuit for SOI device
#702Single diffusion break device for FDSOI
#703MULTI-MODE HYBRID RADIO FREQUENCY (RF) POWER AMPLIFIER WITH DRIVER AMPLIFIER BYPASS
#704Apparatus, system and method of an electrostatically formed nanowire (EFN)
#705Fully depleted semiconductor-on-insulator transistors with different buried dielectric layer charges and different threshold voltages
#706Electronic device for ESD protection
#707Bonding method for semiconductor substrate, and bonded semiconductor substrate
#708Semiconductor-on-insulator (SOI) substrate having dielectric structures that increase interface bonding strength
#709Semiconductor device for radio frequency switch, radio frequency switch, and radio frequency module
#710Silicon-on-insulator backside contacts
#711Sacrificial layer for channel surface retention and inner spacer formation in stacked-channel FETS
#712Semiconductor device and fabricating the same
#713S-contact for SOI
#714Semiconductor device
#715Differential SG/EG spacer integration with equivalent NFET/PFET spacer widths and dual raised source drain expitaxial silicon and triple-nitride spacer integration enabling high-voltage EG device on FDSOI
#716Fully depleted semiconductor-on-insulator transistors with different buried dielectric layer charges and different threshold voltages
#717Method and structure for forming vertical transistors with shared gates and separate gates
#718Method for forming nano sensing chip by selective deposition of sensing materials through device-localized Joule heating and nano sensing chip thereof
#719Deep trench isolation structure in semiconductor device
#720Silicon on insulator with multiple semiconductor thicknesses using layer transfer
#721Fabricating field-effect transistors with body contacts between source, gate and drain assemblies
#722Semiconductor device, manufacturing method for semiconductor device, and electronic apparatus
#723Fully depleted SOI transistor with a buried ferroelectric layer in back-gate
#724Semiconductor device and manufacturing method of the same
#725SOI substrate, semiconductor device and method for manufacturing the same
#726Double-sided capacitor and method for fabricating the same
#727Conductive contacts in semiconductor on insulator substrate
#728High switching frequency, low loss and small form factor fully integrated power stage
#729Fully depleted devices with slots in active regions
#730Segmented main-auxiliary branch configurations for radio frequency applications
#731Horizontal composite electricity supply structure
#732Semiconductor structures with deep trench capacitor and methods of manufacture
#733Isolated wells for resistor devices
#734Shallow trench isolation for integrated circuits
#735Field-effect transistors with a grown silicon-germanium channel
#736Nanosheet transistor with optimized junction and cladding detectivity control
#737Recessed channel structure in FDSOI
#738Field-effect transistors with a grown silicon-germanium channel
#739Low Parasitic Capacitance RF Transistors
#740Two port SRAM cell using complementary nano-sheet/wire transistor devices
#741Semiconductor structure and related method
#742Semiconductor memory having both volatile and non-volatile functionality and method of operating
#743Thermal extraction of single layer transfer integrated circuits
#744SEMICONDUCTOR STRUCTURE WITH INTEGRATED PASSIVE STRUCTURES
#745Ion sensor based on differential measurement, and production method
#746Silicon on insulator semiconductor device with mixed doped regions
#747Vertically stacked dual channel nanosheet devices
#748Radio frequency silicon on insulator wafer platform with superior performance, stability, and manufacturability
#749Double sided NMOS/PMOS structure and methods of forming the same
#750SEMICONDUCTOR DEVICES WITH SIDEWALL SPACERS OF EQUAL THICKNESS
#751Vertically stacked transistors
#752Radio frequency silicon on insulator structure with superior performance, stability, and manufacturability
#753Method and apparatus for use in digitally tuning a capacitor in an integrated circuit device
#754RADIO-FREQUENCY SWITCHES WITH DISTORTER ARMS AND VOLTAGE BUFFERS
#755SUBSTRATE CONTACT FOR A TRANSISTOR, INTENDED IN PARTICULAR FOR A MATRIX-ARRAY ARRANGEMENT
#756Unidirectional ESD protection with buried breakdown thyristor device
#757SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
#758SEMICONDUCTOR DEVICES WITH SIDEWALL SPACERS OF EQUAL THICKNESS
#759Semiconductor structure and manufacturing method thereof
#760Vertically stacked nFET and pFET with dual work function
#761Bulk semiconductor substrate configured to exhibit semiconductor-on-insulator behavior
#762Semiconductor-on-insulator (SOI) substrate comprising a trap-rich layer with small grain sizes
#763Embedded memory using SOI structures and methods
#764Channel layer formation for III-V metal-oxide-semiconductor field effect transistors (MOSFETs)
#765Memory cell and memory cell array having an electrically floating body transistor, and methods of operating same
#766Multistage semiconductor quantum detector circuit incorporating anticorrelation
#767Sequentially switched bulk acoustic wave (BAW) delay line circulator
#768Extended drain MOSFETs (EDMOS)
#769Vertically stacked nFET and pFET with dual work function
#770Semiconductor device and method of manufacturing the same
#771Formation of stacked nanosheet semiconductor devices
#772Shallow trench isolation for integrated circuits
#773VERTICAL SEMICONDUCTOR DEVICE WITH THINNED SUBSTRATE
#774Floating body memory cell having gates favoring different conductivity type regions
#775FEED-FORWARD CIRCUIT TO IMPROVE INTERMODULATION DISTORTION PERFORMANCE OF RADIO-FREQUENCY SWITCH
#776Electro-optically active device
#777Body tie optimization for stacked transistor amplifier
#778Nanosheet eDRAM
#779Logic drive based on standard commodity FPGA IC chips using non-volatile memory cells
#780Integrated electronic device suitable for operation in variable-temperature environments
#781Silicon on insulator semiconductor device with mixed doped regions
#782Tiled lateral thyristor
#783Silicon-on-insulator backside contacts
#784Semiconductor device
#785Method of fabricating RFIC device
#786Method and system for a photonic interposer
#787Integrated circuit chip with strained NMOS and PMOS transistors
#788Vertical transistor with eDRAM
#7893D SEMICONDUCTOR MEMORY DEVICE AND STRUCTURE
#790Multiple work function nanosheet field-effect transistors with differential interfacial layer thickness
#791Substrate for front side type imager and method of manufacturing such a substrate
#792Semiconductor device and method of manufacturing the same
#793Semiconductor device and method of fabricating the same
#794Nano sensing chip including sensing materials operating through device-localized joule heating
#795Array substrates and display screens
#796Enhanced bonding between III-V material and oxide material
#797Semiconductor device for radio frequency switch, radio frequency switch, and radio frequency module
#798Semiconductor-on-insulator finFET devices with high thermal conductivity dielectrics
#799Logic gate designs for 3D monolithic direct stacked VTFET
#800Method for forming a microelectronic device
#801Structure and method for embedded gettering in a silicon on insulator wafer
#802Buried channel conductor insulator semiconductor field effect transistor
#803Vertically stacked nFETs and pFETs with gate-all-around structure
#804Symmetric FET for RF nonlinearity improvement
#805Buried oxide transcap devices
#806Sealed cavity structures with non-planar surface features to induce stress
#807Bulk nanosheet with dielectric isolation
#808SEMICONDUCTOR DEVICE
#8093D SRAM circuit with double gate transistors with improved layout
#810SEMICONDUCTOR DEVICE INCLUDING FDSOI TRANSISTORS WITH COMPACT GROUND CONNECTION VIA BACK GATE
#811Semiconductor device
#812Methods of fabricating dual threshold voltage devices
#813Load drive apparatus
#814AC coupling modules for bias ladders
#815Stacked FET switch bias ladders
#816Positive logic switch with selectable DC blocking circuit
#817Integrated gate driver
#818Silicon-on-insulator structure having bipolar stress, and manufacturing method therefor
#819Method of patterning target layer
#820Methods, apparatus, and system for frequency doubler using a passive mixer for millimeter wave devices
#821Semiconductor devices including structures for reduced leakage current and method of fabricating the same
#822Bulk substrates with a self-aligned buried polycrystalline layer
#823CMOS inverters with asymmetric contact distances and methods of making such inverters
#824Semiconductor-on-insulator transistor with improved breakdown characteristics
#825High voltage switching device
#826Semiconductor structures and method for fabricating the same
#827FinFETs having dielectric punch-through stoppers
#828Backside Charge Control for FET Integrated Circuits
#829Inverting circuit
#830Semiconductor device and method of manufacturing the same
#831Semiconductor device
#832Semiconductor device and method of manufacturing a semiconductor device
#833OTP-MTP on FDSOI architecture and method for producing the same
#834Systems, methods, and apparatus for enabling high voltage circuits
#835Methods of forming stacked SOI semiconductor devices with back bias mechanism
#836Memory cell array with large gate widths
#837Semiconductor structures with deep trench capacitor and methods of manufacture
#838Integrated circuit having memory cell array including barriers, and method of manufacturing same
#8393D semiconductor device and structure
#840Semiconductor device and method including a conductive member within a trench
#841Radio-frequency switch having stack of non-uniform elements
#842Method and apparatus for using back gate biasing for power amplifiers for millimeter wave devices
#843Multi-layered passivation layer of a back-channel-etched thin film transistor having different oxygen concentration
#844Backside contact to a final substrate
#845Semiconductor memory having both volatile and non-volatile functionality including resistance change material and method of operating
#846Integrated circuits (ICs) on a glass substrate
#847Electronic device and method of manufacturing the same
#848SOI substrate
#849Cascode heterojunction bipolar transistor
#850Integrated circuit with resurf region biasing under buried insulator layers
#851Semiconductor device
#852Back biasing of FD-SOI circuit blocks
#853Semiconductor devices and methods of fabricating the same
#854Semiconductor device including buried insulation layer and manufacturing method thereof
#855Method of boosting RON*COFF performance
#856Semiconductor logic element and logic circuitries
#857High switching frequency, low loss and small form factor fully integrated power stage
#858High aspect ratio channel semiconductor device and method of manufacturing same
#859Substrate having two semiconductor materials on insulator
#860Semiconductor integrated circuit device with SOTE and MOS transistors
#861Method and system for monolithic integration of photonics and electronics in CMOS processes
#862Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction
#863Sacrificial layer for channel surface retention and inner spacer formation in stacked-channel FETs
#864Resistor for dynamic random access memory
#8653D semiconductor device
#866Methods of fabricating silicon-on-insulator (SOI) semiconductor devices using blanket fusion bonding
#867Logic gate designs for 3D monolithic direct stacked VTFET
#868SEMICONDUCTOR DEVICE FORMED ON A SOI SUBSTRATE
#869Semiconductor device
#870Transistor structure in low noise amplifier
#871THREE-DIMENSIONAL STACKED VERTICAL TRANSPORT FIELD EFFECT TRANSISTOR LOGIC GATE WITH BURIED POWER BUS
#872Method for manufacturing bonded SOI wafer
#873Organic light emitting device and display apparatus having the same
#874Semiconductor structures with deep trench capacitor and methods of manufacture
#875Third type of metal gate stack for CMOS devices
#876COMPARATOR HAVING DIFFERENTIAL FDSOI TRANSISTOR PAIR WITH GATE CONNECTED TO BACK-GATE TO REDUCE RTS NOISE
#877Semiconductor device having buried gate structure and method of fabricating the same
#878Power semiconductor device having an SOI island
#879Butted body contact for SOI transistor
#880Radio-frequency isolation cavities and cavity formation
#881Topside radio-frequency isolation cavity configuration
#882Assembly for 3D circuit with superposed transistor levels
#883Parallel-connected merged-floating-gate nFET-pFET EEPROM cell and array
#884Amplifier circuit for cryogenic applications
#885Capacitive tuning using backside gate
#886Bonding pad architecture using capacitive deep trench isolation (CDTI) structures for electrical connection
#887Nonvolatile nanotube switches with reduced switching voltages and currents
#888Pillar-shaped semiconductor device and method for producing the same
#889Three-dimensional monolithic vertical field effect transistor logic gates
#890Three-dimensional stacked vertical transport field effect transistor logic gate with buried power bus
#891SEMICONDUCTOR STRUCTURE WITH INTEGRATED PASSIVE STRUCTURES
#892Method for fabricating a strained semiconductor-on-insulator substrate
#893Method probe with high density electrodes, and a formation thereof
#894Transistor device
#895High voltage switching device
#896Transistor device
#897Transistor device
#898Method of forming an integrated circuit (IC) with shallow trench isolation (STI) regions and the resulting IC structure
#899Transistor finger spacing and dimension variation in electronic devices
#900Methods for integrated devices on an engineered substrate