208009 ⎘
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
Semiconductor chip
#902Integrated circuit connection arrangement for minimizing crosstalk
#903Back-channel-etched TFT substrate and manufacturing method thereof
#904Backside contact resistance reduction for semiconductor devices with metallization on both sides
#9053D circuit transistors with flipped gate
#906Battery management chip circuit on the base of silicon on insulator (SOI) process
#907Embedded memory using SOI structures and methods
#908Complementary transistor and semiconductor device
#909Process to form SOI substrate
#910Structure for radiofrequency applications
#911Field effect transistor with decoupled channel and methods of manufacturing the same
#912Deep trench isolation structure in semiconductor device
#913Semiconductor wafer with modified surface and fabrication method thereof
#914FOUR TERMINAL STACKED COMPLEMENTARY JUNCTION FIELD EFFECT TRANSISTORS
#915Semiconductor device
#916Radiation-damage-compensation-circuit and SOI-MOSFET
#917SOI substrate, semiconductor device and method for manufacturing the same
#918Vertically stacked NFETS and PFETS with gate-all-around structure
#919Vertically stacked dual channel nanosheet devices
#920Vertically stacked nFET and pFET with dual work function
#921Display substrate with uniform gate insulation structure
#922Integrated Process Flow For Semiconductor Devices
#923Methods and Apparatuses for Use in Tuning Reactance in a Circuit Device
#924Silicide block isolation for reducing off-capacitance of a radio frequency (RF) switch
#925Vertical field effect transistor including integrated antifuse
#926Integrated circuit having a MOM capacitor and transistor
#927Traveling-wave switch with multiple source nodes
#928Display device
#929Integrated circuits with components on both sides of a selected substrate and methods of fabrication
#930Semiconductor-on-insulator substrate for RF applications
#931Transistor layout for improved harmonic performance
#932Hybrid CMOS device and manufacturing method thereof
#933Laterally diffused metal oxide semiconductor (LDMOS) transistor on a semiconductor on insulator (SOI) layer with a backside device
#934Body current bypass resistor
#935Method of manufacturing a semiconductor device and a semiconductor device
#936Semiconductor circuit and semiconductor device
#937High performance SiGe heterojunction bipolar transistors built on thin-film silicon-on-insulator substrates for radio frequency applications
#938High performance SiGe heterojunction bipolar transistors built on thin film silicon-on-insulator substrates for radio frequency applications
#939Method for fabricating static random access memory having insulating layer with different thicknesses
#940Single-stack bipolar-based ESD protection device
#941Semiconductor devices, and a method for forming a semiconductor device
#942Low parasitic capacitance low noise amplifier
#943Area-efficient single-legged SOI MOSFET structure immune to single-event-effects and bipolar latch-up
#944Integrated circuit device
#945Semiconductor device and method of manufacturing same
#946Semiconductor integrated circuit
#947Flipped vertical field-effect-transistor
#948Semi-sequential 3D integration
#949Method of depositing charge trapping polycrystalline silicon films on silicon substrates with controllable film stress
#950Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction
#951BONDING PAD ARCHITECTURE USING CAPACITIVE DEEP TRENCH ISOLATION (CDTI) STRUCTURES FOR ELECTRICAL CONNECTION
#952Stacked SOI semiconductor devices with back bias mechanism
#953Hybrid cascode constructions with multiple transistor types
#954Switch with local silicon on insulator (SOI) and deep trench isolation
#955Semiconductor device and manufacturing method therefor
#956Semiconductor on insulator structure comprising a buried high resistivity layer
#957Method and system for a photonic interposer
#958Depletion mode buried channel conductor insulator semiconductor field effect transistor
#959Semiconductor memory device, method of manufacturing the same, and electronic device including the same
#960Orthogonal transistor layouts
#961Semiconductor device and semiconductor wafer including a porous layer and method of manufacturing
#962Method of fabricating 3-dimensional transistor sensor, the sensor and sensor array thereof
#963Semiconductor device and manufacturing method for semiconductor device
#964Method for Forming a PN Junction and Associated Semiconductor Device
#965Semiconductor on insulator structure comprising a plasma nitride layer and method of manufacture thereof
#966Micro-LED display device and method of fabricating the same
#967High dose implantation for ultrathin semiconductor-on-insulator substrates
#968Gallium nitride voltage regulator
#969Co-integration of bulk and SOI transistors
#970Semiconductor on insulator structure comprising a plasma oxide layer and method of manufacture thereof
#971SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF
#972Double density nonvolatile nanotube switch memory cells
#973Post gate silicon germanium channel condensation and method for producing the same
#974Superlattice materials and applications
#975Semiconductor device and manufacturing method of the same
#976Integrated circuits with memory cells and methods for producing the same
#977Semiconductor device
#978Semiconductor devices and manufacturing techniques for reduced aspect ratio of neighboring gate electrode lines
#979Control of length in gate region during processing of VFET structures
#980Cascode heterojunction bipolar transistors
#981Semiconductor device
#982Floating body memory cell having gates favoring different conductivity type regions
#983System and method for controlling switching device in power converter
#984Optimized double-gate transistors and fabricating process
#985Techniques and structure for forming thin silicon-on-insulator materials
#986Extremely thin silicon-on-insulator silicon germanium device without edge strain relaxation
#987Isolated wells for resistor devices
#988Isolated wells for resistor devices
#989Ion sensor based on differential measurement, and production method
#990Devices and methods for improving voltage handling and/or bi-directionality of stacks of elements when connected between terminals
#991Strained semiconductor using elastic edge relaxation of a stressor combined with buried insulating layer
#992Production of semiconductor regions in an electronic chip
#9933D semiconductor device and structure
#994Semiconductor device and fabricating method of the same
#995Laterally diffused metal oxide semiconductor device integrated with vertical field effect transistor
#9963D integration method using SOI substrates and structures produced thereby
#997LATERALLY DIFFUSED FIELD EFFECT TRANSISTOR IN SOI CONFIGURATION
#998Method of manufacturing a semiconductor device and a semiconductor device
#999Circuits having a switch with back-gate bias
#1000Four terminal stacked complementary junction field effect transistors
#1001DIELECTRIC CAPACITOR
#1002SOI substrate compatible with the RFSOI and FDSOI technologies
#1003Production of semiconductor regions in an electronic chip
#1004SINGLE MASK LEVEL FORMING BOTH TOP-SIDE-CONTACT AND ISOLATION TRENCHES
#1005IC WITH TRENCHES FILLED WITH ESSENTIALLY CRACK-FREE DIELECTRIC
#1006Semiconductor integrated circuit device comprising MISFETs in SOI and bulk substrate regions
#1007Method for manufacturing a transistor having a sharp junction by forming raised source-drain regions before forming gate regions and corresponding transistor produced by said method
#1008Semiconductor device including an ESD protective element
#1009Integrated gallium nitride based DC-DC converter
#1010Tunable breakdown voltage RF FET devices
#1011Semiconductor device
#1012Transient stabilized SOI FETs
#1013Semiconductor device with coils in different wiring layers
#10143D integration method using SOI substrates and structures produced thereby
#1015Integrated circuit emulating neural system with neuron circuit and synapse device array and fabrication method thereof
#1016Biosensor devices, systems and methods for detecting or analyzing a sample
#1017RADIO-FREQUENCY SWITCH HAVING INTERMEDIATE SHUNT
#1018Integrated circuit chip with strained NMOS and PMOS transistors
#1019SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
#1020Terahertz detector comprised of p-n junction diode
#1021RFIC device and method of fabricating same
#1022RFIC device and method of fabricating same
#1023Techniques for creating a local interconnect using a SOI wafer
#1024Semiconductor memory having both volatile and non-volatile functionality including resistance change material and method of operating
#1025Image sensor and electronic camera
#1026High power RF switches using multiple optimized transistors and methods for fabricating same
#1027Method of making a CMOS semiconductor device using a stressed silicon-on-insulator (SOI) wafer
#1028Tunable breakdown voltage RF FET devices
#1029Semiconductor device and method of manufacturing the same
#1030Fabrication and use of through silicon vias on double sided interconnect device
#1031FDSOI channel control by implanted high-k buried oxide
#1032METHOD FOR LATE DIFFERENTIAL SOI THINNING FOR IMPROVED FDSOI PERFORMANCE AND HCI OPTIMIZATION
#1033Isolated semiconductor layer in bulk wafer by localized silicon epitaxial seed formation
#1034Switches with multiple field-effect transistors having proximity electrodes
#1035Cascode radio frequency (RF) power amplifier on single diffusion
#1036Semiconductor device
#1037POWER RAIL AND MOL CONSTRUCTS FOR FDSOI
#10383D integration method using SOI substrates and structures produced thereby
#1039Floating body contact circuit method for improving ESD performance and switching speed
#1040RADIO-FREQUENCY SWITCHES HAVING SILICON-ON-INSULATOR FIELD-EFFECT TRANSISTORS WITH REDUCED LINEAR REGION RESISTANCE
#1041BIOLOGICAL SENSING SYSTEM HAVING MICRO-ELECTRODE ARRAY
#1042Backside substrate openings in transistor devices
#1043Method and structure for forming vertical transistors with shared gates and separate gates
#1044Method for fabricating an array of diodes, in particular for a non-volatile memory, and corresponding device
#1045Semiconductor device
#1046Electrostatic discharge (ESD) protection circuits using tunneling field effect transistor (TFET) and impact ionization MOSFET (IMOS) devices
#1047DUAL ACTIVE LAYER SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
#1048Flash memory cells, components, and methods
#1049Semiconductor structures with deep trench capacitor and methods of manufacture
#1050Integrated circuit capable of operating at very high voltage and method of fabricating same
#1051Field effect transistor with stacked nanowire-like channels and methods of manufacturing the same
#1052Backside contact to a final substrate
#1053Porous semiconductor handle substrate
#1054Capacitor, method for manufacturing same, and wireless communication device using same
#1055Method and apparatus for back-biased switch transistors
#1056Semiconductor device and method for manufacturing semiconductor device with low-permittivity layers
#1057Semiconductor structure with integrated passive structures
#1058Overvoltage protection
#1059Field-effect transistors with a T-shaped gate electrode
#1060Tunable breakdown voltage RF FET devices
#1061Thin Polysilicon For Lower Off-Capacitance Of A Radio Frequency (RF) Silicon-On-Insulator (SOI) Switch Field Effect Transistor (FET)
#1062FinFET vertical flash memory
#1063Static random access memory having insulating layer with different thicknesses
#1064MTP memory for SOI process
#1065Electronic device for ESD protection
#1066Transistor having structured source and drain regions and production method thereof
#1067FDSOI with on-chip physically unclonable function
#1068Method of assembling artificial electronic skin
#1069PN junction-based electrical fuse using reverse-bias breakdown to induce an open conduction state
#1070Dense arrays and charge storage devices
#1071High-frequency semiconductor amplifier
#1072Vertical semiconductor device
#1073Method of forming an integrated circuit (IC) with hallow trench isolation (STI) regions and the resulting IC structure
#1074Semiconductor devices and methods to enhance electrostatic discharge (ESD) robustness, latch-up, and hot carrier immunity
#1075Method of manufacturing semiconductor device and semiconductor device
#1076Method for producing bonded SOI wafer
#1077Nonlinear resistor with two transistor chains
#1078Low-loss silicon on insulator based dielectric microstrip line
#1079ADVANCED TECHNIQUES TO MANIPULATE THE C-V CHARACTERISTICS OF VARIABLE CAPACITORS
#1080Integrated circuit connection arrangement for minimizing crosstalk
#1081Semiconductor Device and Method of Manufacturing the Same
#1082Connection arrangements for integrated lateral diffusion field effect transistors
#1083Electro-optical and optoelectronic devices
#1084Fully-depleted silicon-on-insulator transistors
#1085Semiconductor device including buried capacitive structures and a method of forming the same
#1086Leadframe and integrated circuit connection arrangement
#1087Cascode amplifier optimization
#1088Semiconductor structure and method for manufacturing the same
#1089Local trap-rich isolation
#1090Method of depositing charge trapping polycrystalline silicon films on silicon substrates with controllable film stress
#1091Memory cell structure, method of manufacturing a memory, and memory apparatus
#1092Semiconductor devices with low junction capacitances and methods of fabrication thereof
#1093Semiconductor device with low band-to-band tunneling
#1094Tunable breakdown voltage RF FET devices
#1095ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, DISPLAY PANEL AND DISPLAY DEVICE
#1096TRENCH ISOLATION FORMATION FROM THE SUBSTRATE BACK SIDE USING LAYER TRANSFER
#1097Semiconductor structures with deep trench capacitor and methods of manufacture
#1098Semiconductor device and method of fabricating the same
#1099Semiconductor device
#1100Flipped vertical field-effect-transistor
#1101Vertically integrated nanosheet fuse
#1102Vertically integrated nanosheet fuse
#1103Integrated strained stacked nanosheet FET
#1104Stacked nanowire device width adjustment by gas cluster ion beam (GCIB)
#1105Butted body contact for SOI transistor
#1106Methods and structures for reducing back gate effect in a semiconductor device
#1107Connecting bar
#1108Semiconductor device, vehicle-mounted semiconductor device, and vehicle-mounted control device
#1109Field-effect transistors having black phosphorus channel and methods of making the same
#1110Semiconductor memory device and structure
#1111Display apparatus
#1112Semiconductor device
#1113Semiconductor device structure useful for bulk transistor and method of manufacturing same
#1114Fully depleted silicon-on-insulator (FDSOI) transistor device and self-aligned active area in FDSOI bulk exposed regions
#1115Radio frequency switch having field effect transistor cells
#1116Device for protection against electrostatic discharges with a distributed trigger circuit
#1117Method for preparing substrate with insulated buried layer
#1118CMOS compatible BioFET
#1119Memory array with one shared deep doped region
#1120Integrated circuit comprising adjustable back biasing of one or more logic circuit regions
#1121Switch linearization by compensation of a field-effect transistor
#1122Semiconductor device and method of manufacturing thereof
#1123Structure and method for fully depleted silicon on insulator structure for threshold voltage modification
#1124Stacked three-dimensional arrays of two terminal nanotube switching devices
#1125Bipolar junction transistors with a combined vertical-lateral architecture
#1126Gate structure with dual width electrode layer
#1127Wafers and device structures with body contacts
#1128Semiconductor device including a vacuum gap and method for manufacturing the same
#1129Preparation method for heterogeneous SiGe based plasma P-I-N diode string for sleeve antenna
#1130Manufacturing method for AlAs—Ge—AlAs structure based plasma p-i-n diode in multilayered holographic antenna
#1131Self-aligned vertical transistor with local interconnect
#1132Integrated circuit chip with molding compound handler substrate and method
#1133Hybrid III-V technology to support multiple supply voltages and off state currents on same chip
#1134Field effect transistor with decoupled channel and methods of manufacturing the same
#1135Semiconductor devices including separate doped regions
#1136On-chip heater
#1137Programmable structured arrays
#1138Body tie optimization for stacked transistor amplifier
#1139Digitally controlled varactor structure for high resolution DCO
#1140MOSFET and memory cell having improved drain current through back bias application
#1141Semiconductor device with transistor in semiconductor substrate and insulated contact plug extending through the substrate
#1142Semiconductor device and fabricating method thereof
#1143Logic and flash field-effect transistors
#1144S-Contact for SOI
#1145Method for direct bonding of substrates including thinning of the edges of at least one of the two substrates
#1146Semiconductor integrated circuit device and wearable device
#1147SOI power LDMOS device
#1148Superlattice materials and applications
#1149On-chip through-body-via capacitors and techniques for forming same
#1150Breakdown resistant semiconductor apparatus and method of making same
#1151Stacked field-effect transistor switch
#1152Field-effect transistors with a buried body contact
#1153Carrier bypass for electrostatic discharge
#1154Devices and methods related to radio-frequency switches having improved on-resistance performance
#1155Method for producing SOI wafer
#1156Semiconductor device having SOI substrate and first and second diffusion layer
#1157SEMICONDUCTOR SUBSTRATE WITH METALLIC DOPED BURIED OXIDE
#1158Semiconductor device
#1159Self-aligned back-plane and well contacts for fully depleted silicon on insulator device
#1160SEMICONDUCTOR STRUCTURES AND METHOD FOR FABRICATING THE SAME
#1161Memory cell
#1162Air-cavity module with enhanced device isolation
#1163Vertical system integration
#1164Vertical system integration
#1165Manifolded gate resistance network
#1166Semiconductor device including a repeater/buffer at upper metal routing layers and methods of manufacturing the same
#1167Semiconductor devices
#1168Method of fabrication of a semiconductor element comprising a highly resistive substrate
#1169Semiconductor device having semiconductor optical waveguide and opposed insulator-filled trench and manufacturing method thereof
#1170Thick FDSOI source-drain improvement
#1171Fabrication of a pair of vertical fin field effect transistors having a merged top source/drain
#1172Fabrication of a pair of vertical fin field effect transistors having a merged top source/drain
#1173Semiconductor device and method of manufacturing the same
#1174Flipped vertical field-effect-transistor
#1175Fabrication of a pair of vertical fin field effect transistors having a merged top source/drain
#1176Method for forming an extremely thin silicon-on-insulator (ETSOI) device having reduced parasitic capacitance and contact resistance due to wrap-around structure of source/drain regions
#1177Packaging optoelectronic components and CMOS circuitry using silicon-on-insulator substrates for photonics applications
#1178High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency
#1179Method of patterning target layer
#1180Method for local isolation between transistors produced on an SOI substrate, in particular an FDSOI substrate, and corresponding integrated circuit
#1181Isolation of semiconductor device with buried cavity
#1182Convex shaped thin-film transistor device having elongated channel over insulating layer in a groove of a semiconductor substrate
#1183Cavity formation in backside interface layer for radio-frequency isolation
#1184High density nanosheet diodes
#1185Device for protection against electrostatic discharges with a distributed trigger circuit
#1186Methods and apparatuses for use in tuning reactance in a circuit device
#1187Semiconductor device and manufacturing method thereof
#1188FDSOI-TYPE FIELD-EFFECT TRANSISTORS
#1189Isolated semiconductor layer over buried isolation layer
#1190Main-auxiliary field-effect transistor structures for radio frequency applications
#1191Series main-auxiliary field-effect transistor configurations for radio frequency applications
#1192Parallel main-auxiliary field-effect transistor configurations for radio frequency applications
#1193Hybrid main-auxiliary field-effect transistor configurations for radio frequency applications
#1194Stacked auxiliary field-effect transistors with buffers for radio frequency applications
#1195Stacked auxiliary field-effect transistor configurations for radio frequency applications
#1196DISPLAY DEVICE
#1197Semiconductor non-volatile DRAM (NVDRAM) device
#1198Semiconductor device
#1199Multi-threshold voltage field effect transistor and manufacturing method thereof
#1200Backside device contact