208229 ⎘
Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor; Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
III-N devices in Si trenches
#302Power semiconductor device and method for manufacturing the same
#303Method for manufacturing semiconductor device
#304Method of making a semiconductor device formed by thermal annealing
#305Semiconductor device
#306Multilayer graphene, method of forming the same, device including the multilayer graphene, and method of manufacturing the device
#307Superlattice lateral bipolar junction transistor
#308Power semiconductor devices, semiconductor devices and a method for adjusting a number of charge carriers
#309Integrated circuit containing DOEs of NCEM-enabled fill cells
#310Semiconductor device and method for fabricating the same
#311Semiconductor device and manufacturing method thereof
#312Fabrication of semiconductor junctions
#313FinFET low resistivity contact formation method
#314Semiconductor device and manufacturing method thereof
#315Semiconductor device and method for manufacturing the same
#316Power semiconductor device
#317Semiconductor device
#318Etching compositions and methods for using same
#319Semiconductor device
#320Non-volatile semiconductor memory device
#321Semiconductor chip
#322Electrostatic discharge protection device for differential signal devices
#323Semiconductor device and selector circuit
#324Bi-directional Zener diode having a first and second impurity regions groups formed in surface portion of a substrate and a first electrode electrically connected to at least one first impurity regions, and not connected from at least another one
#325Maximizing potential good die per wafer, PGDW
#326Semiconductor device manufacturing method including heat treatment
#327Multi-Trench Semiconductor Devices
#328Semiconductor device including crystal defect region and method for manufacturing the same
#329Semiconductor device
#330Semiconductor device and method of manufacturing the same
#331Semiconductor device
#332MOS varactors and semiconductor integrated devices including the same
#333MOS transistor and method of manufacturing the same
#334Method for forming semiconductor structure with nanowire structures
#335BJT structure design for 14nm FinFET device
#336Tunnel barrier schottky
#337Methods of forming power semiconductor devices having superjunction structures with pillars having implanted sidewalls
#338Structure for relaxed SiGe buffers including method and apparatus for forming
#339Semiconductor wafer for integrated packages
#340Monolithic integration of high voltage transistors and low voltage non-planar transistors
#341Semiconductor device and method of manufacturing semiconductor device
#342Semiconductor device and method of manufacturing semiconductor device
#343SEMICONDUCTOR ESD PROTECTION CIRCUIT
#344Semiconductor device and method of manufacturing semiconductor device
#345Semiconductor device and method for manufacturing semiconductor device
#346Electrostatic discharge protection device comprising a silicon controlled rectifier
#347CMOS device including a non-straight PN-boundary and methods for generating a layout of a CMOS device
#348Power amplifier modules including tantalum nitride terminated through wafer via and related systems, devices, and methods
#349Power amplifier modules with harmonic termination circuit and related systems, devices, and methods
#350Electrostatic discharge and passive structures integrated in a vertical gate fin-type field effect diode
#351Power amplifier modules with power amplifier and transmission line and related systems, devices, and methods
#352METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
#353SEMICONDUCTOR DEVICE HAVING AN ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT
#354Diodes and fabrication methods thereof
#355Reverse conducting IGBT
#356Low temperature poly-silicon thin-film transistor and manufacturing method thereof
#357FinFET having buffer layer between channel and substrate
#358Semiconductor structure having logic region and analog region
#359Nitride semiconductor device
#360Semiconductor device and related electronic device
#361Utilization of angled trench for effective aspect ratio trapping of defects in strain-relaxed heteroepitaxy of semiconductor films
#362Silicon substrates with compressive stress and methods for production of the same
#363Semiconductor device having symmetric and asymmetric active fins
#364Electrostatic discharge protection circuit
#365Avalanche-rugged silicon carbide (SiC) power Schottky rectifier
#366Semiconductor device and method for manufacturing semiconductor device
#367Semiconductor device
#368Non-planar semiconductor device having hybrid geometry-based active region
#369SEMICONDUCTOR DEVICE
#370Semiconductor device
#371FinFET including tunable fin height and tunable fin width ratio
#372Power semiconductor rectifier with controllable on-state voltage
#373Vapor deposition of metal oxides, silicates and phosphates, and silicon dioxide
#374Epitaxial growth of crystalline material
#375Transistor, method for manufacturing transistor, semiconductor device, and electronic device
#376Semiconductor device and method of manufacturing semiconductor device
#377SEMICONDUCTOR DEVICE
#378COMPOUND SEMICONDUCTOR STRUCTURE
#379System and method for fabricating high voltage power MOSFET
#380LATERALLY DIFFUSED METAL OXIDE SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR
#381IGBT with built-in diode and manufacturing method therefor
#382SEMICONDUCTOR STRUCTURE WITH NANOWIRE STRUCTURES AND MANUFACTURING METHOD THEREOF
#383Semiconductor device and related method of adjusting threshold voltage in semiconductor device during manufacture via counter doping in diffusion region
#384Semiconductor device and formation thereof
#385Schottky structure employing central implants between junction barrier elements
#386Vertical power transistor device
#387Semiconductor device, method of manufacturing the same, and power module
#388Buried Trench Isolation in Integrated Circuits
#389Semiconductor device, related manufacturing method, and related electronic device
#390Semiconductor device
#391HIGH MOBILITY TRANSISTORS
#392Semiconductor structure and manufacturing method thereof
#393Semiconductor device and manufacturing method for the semiconductor device
#394Semiconductor device having overload current carrying capability
#395Semiconductor device
#396Device isolation for III-V substrates
#397Power semiconductor devices having superjunction structures with implanted sidewalls
#398SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
#399Semiconductor device and method of manufacturing same
#400Semiconductor device
#401Transient voltage suppressor and ESD protection device and array thereof
#402Semiconductor device
#403Electrostatic discharge protection device and electronic device having the same
#404Semiconductor chip
#405Semiconductor device
#406Very high aspect ratio contact
#407SEMICONDUCTOR WAFER AND METHOD OF PRODUCING SEMICONDUCTOR WAFER
#408Active pixel sensor having a raised source/drain
#409SEMICONDUCTOR DEVICE AND METHOD
#410Diamond Like Carbon (DLC) in a Semiconductor Stack as a Selector for Non-Volatile Memory Application
#411Method of forming a semiconductor device and structure therefor
#412Semiconductor film with adhesion layer and method for forming the same
#413Semiconductor device and method for manufacturing semiconductor device
#414Method for making high voltage integrated circuit devices in a fin-type process and resulting devices
#415Semiconductor device
#416VAPOR DEPOSITION OF METAL OXIDES, SILICATES AND PHOSPHATES, AND SILICON DIOXIDE
#417SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
#418Semiconductor device, and method of manufacturing the same
#419Semiconductor device
#420Method of forming an epitaxial semiconductor layer in a recess and a semiconductor device having the same
#421Semiconductor device
#422SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
#423SEMICONDUCTOR DEVICE
#424Semiconductor device
#425Power semiconductor devices
#426FinFET semiconductor device with isolated fins made of alternative channel materials
#427Semiconductor integrated circuit device comprising MISFETs in SOI and bulk subtrate regions
#428Semiconductor device
#429Process for treating a substrate using a luminous flux of determined wavelength, and corresponding substrate
#430NANOSTRUCTURES AND NANOFEATURES WITH Si (111) PLANES ON Si (100) WAFERS FOR III-N EPITAXY
#431SEMICONDUCTOR DEVICE
#432Thin film transistor, manufacturing method thereof, array substrate and display apparatus
#433Semiconductor wafer, semiconductor device, and method for manufacturing nitride semiconductor layer
#434Tunnel transistors with abrupt junctions
#435Planar semiconductor ESD device and method of making same
#436Semiconductor devices
#437Semiconductor element and semiconductor device
#438THIN FILM TRANSISTOR, ARRAY SUBSTRATE AND DISPLAY DEVICE
#439NITRIDE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR DEVICE
#440Junction barrier schottky diode and method for manufacturing the same
#441Semiconductor device including a semiconductor sheet interconnecting a source region and a drain region
#442Semiconductor device including a semiconductor sheet unit interconnecting a source and a drain
#443Semiconductor device having an insulated gate bipolar transistor arrangement
#444Device and method for bridging an electrical energy storage
#445Device isolation for III-V substrates
#446Semiconductor device with isolating layer on side and bottom surfaces
#447Semiconductor device structures with doped elements and methods of formation
#448Surface profile for semiconductor region
#449Controller
#450Semiconductor device
#451Lithographic stack excluding SiARC and method of using same
#452Method of forming an epitaxial semiconductor layer in a recess and a semiconductor device having the same
#453Utilization of angled trench for effective aspect ratio trapping of defects in strain relaxed heteroepitaxy of semiconductor films
#454Techniques for forming angled structures for reduced defects in heteroepitaxy of semiconductor films
#455Field-effect transistor
#456Nitride semiconductor device
#457Semiconductor device having an insulated gate bipolar transistor arrangement and a method for forming such a semiconductor device
#458Contact structure of semiconductor device
#459Defect-free relaxed covering layer on semiconductor substrate with lattice mismatch
#460FinFET including tunable fin height and tunable fin width ratio
#461Semiconductor device, nitride semiconductor wafer, and method for forming nitride semiconductor layer
#462Ultra-fast breakover diode
#463Semiconductor device
#464Diode-based ESD concept for DEMOS protection
#465SEMICONDUCTOR DEVICE
#466Semiconductor device
#467Self-aligned liner method of avoiding PL gate damage
#468Defective P-N junction for backgated fully depleted silicon on insulator mosfet
#469Semiconductor device
#470System and method of manufacturing a fin field-effect transistor having multiple fin heights
#471Semiconductor device and fabrication method thereof
#472Method for manufacturing semiconductor device
#473Printing minimum width semiconductor features at non-minimum pitch and resulting device
#474Thin film transistor substrate and organic light-emitting diode (OLED) display having the same
#475FinFET with trench field plate
#476Polycrystalline silicon wafer
#477Semiconductor film with adhesion layer and method for forming the same
#478Double trench well formation in SRAM cells
#479Semiconductor structure and semiconductor device having the same
#480Semiconductor device and method for forming a semiconductor device
#481Semiconductor device and method for forming a semiconductor device
#482Semiconductor device and method for manufacturing a semiconductor device
#483Semiconductor arrangement
#484Compound semiconductor structure
#485ENGINEERED SUBSTRATES HAVING MECHANICALLY WEAK STRUCTURES AND ASSOCIATED SYSTEMS AND METHODS
#486Bulk finFET with controlled fin height and high-k liner
#487Ultra-fast breakover diode
#488SILICON CARBIDE EPITAXIAL WAFER AND MANUFACTURING METHOD THEREFOR
#489Semiconductor device, antenna switch circuit, and radio communication apparatus
#490High-voltage transistor device and production method
#491Epitaxial growth of crystalline material
#492Fin field-effect transistors
#493Semiconductor structures, devices and engineered substrates including layers of semiconductor material having reduced lattice strain
#494Defective P-N junction for backgated fully depleted silicon on insulator MOSFET
#495SCHOTTKY BARRIER DIODES WITH A GUARD RING FORMED BY SELECTIVE EPITAXY
#496Semiconductor device with compensation regions
#497Micro LED display
#498MOS P-N junction Schottky diode device and method for manufacturing the same
#499SEMICONDUCTOR DEVICE
#500Semiconductor device having deep wells and fabrication method thereof
#501Spacer assisted pitch division lithography
#502Manufacturing method for a micromechanical component and a corresponding micromechanical component
#503III-N SEMICONDUCTOR-ON-SILICON STRUCTURES AND TECHNIQUES
#504Strain relaxation using metal materials and related structures
#505Double trench well formation in SRAM cells
#506Schottky barrier diode
#507SEMICONDUCTOR DEVICE, DISPLAY, AND ELECTRONIC APPARATUS
#508Contact structure of semiconductor device
#509Semiconductor device and method for fabricating semiconductor device
#510Semiconductor device having super junction structure and method for manufacturing the same
#511Bulk finFET with controlled fin height and high-K liner
#512Nitride semiconductor device and method of manufacturing the same
#513Layout configuration for memory cell array
#514Semiconductor devices
#515FinFET with trench field plate
#516LAYER SYSTEM OF A SILICON-BASED SUPPORT AND A HETEROSTRUCTURE APPLIED DIRECTLY ONTO THE SUPPORT
#517Adjustable avalanche diode in an integrated circuit
#518Semiconductor structure and manufacturing method for the same
#519Method of fabricating tunnel transistors with abrupt junctions
#520METHOD FOR FORMING SEMICONDUCTOR DEVICES WITH ACTIVE SILICON HEIGHT VARIATION
#521METHOD FOR PRODUCING COLUMNAR STRUCTURE
#522Method of manufacturing semiconductor wafer, and composite base and composite substrate for use in that method
#523Substrate with buffer layer for oriented nanowire growth
#524Epitaxy technique for reducing threading dislocations in stressed semiconductor compounds
#525Process for treating a substrate using a luminous flux of determined wavelength, and corresponding substrate
#526Quantum dot gate FETs and circuits configured as biosensors and gene sequencers
#527Micro device array for transfer to a receiving substrate
#528Micro light emitting diode
#529Method of transferring a light emitting diode
#530Schottky barrier diodes with a guard ring formed by selective epitaxy
#531Layout configuration for memory cell array
#532METHOD FOR PRODUCING SILICON WAFER AND SILICON WAFER
#533Semiconductor integrated circuit device and manufacturing method for semiconductor integrated circuit device
#534Semiconductor devices with active semiconductor height variation
#535Semiconductor structures, devices and engineered substrates including layers of semiconductor material having reduced lattice strain
#536Semiconductor structure and manufacturing method for the same
#537Semiconductor device and manufacturing method of the same
#538Semiconductor device and method for manufacturing semiconductor device
#539Semiconductor device
#540Method of manufacturing semiconductor wafer, and composite base and composite substrate for use in that method
#541Semiconductor device and fabrication method thereof
#542Semiconductor device, method of manufacturing the same, and power module
#543Strain relaxation using metal materials and related structures
#544Silicon carbide epitaxial wafer and manufacturing method therefor
#545Semiconductor device and manufacturing method of the same
#546Epitaxial growth of crystalline material
#547Semiconductor device having super junction structure and method for manufacturing the same
#548Vapor deposition of metal oxides, silicates and phosphates, and silicon dioxide
#549Schottky barrier diode
#550ASSIGNING TASKS IN A DISTRIBUTED SYSTEM
#551Method for forming semiconductor devices with active silicon height variation
#552SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
#553Semiconductor device, display, electronic apparatus and method of manufacturing a semiconductor device
#554Manufacturing method of silicon spin transport device and silicon spin transport device
#555Semiconductor device and manufacturing method of the same
#556Method for forming semiconductor devices with active silicon height variation
#557Methods of forming layers of semiconductor material having reduced lattice strain, semiconductor structures, devices and engineered substrates including same
#558Epitaxial growth of crystalline material
#559MOS P-N junction schottky diode device and method for manufacturing the same
#560MOS P-N junction diode device and method for manufacturing the same
#561Semiconductor device and manufacturing method thereof
#562Silicon carbide semiconductor device
#563Diode-based ESD concept for DEMOS protection
#564Semiconductor device and method for fabricating the same
#565Semiconductor device having super junction structure
#566Folded-gate MOS transistor
#567Semiconductor device and method for manufacturing the same
#568Merged P-i-N Schottky structure
#569Semiconductor device and manufacturing method thereof
#570Vapor deposition of metal oxides, silicates and phosphates, and silicon dioxide
#571Semiconductor device
#572Merged P-i-N schottky structure
#573MOS power component with a reduced surface area
#574MOS type variable capacitance device
#575Semiconductor rectifier and manufacturing method of the same
#576Semiconductor structures
#577Method of forming high-voltage silicon-on-insulator device with diode connection to handle layer
#578Integrated circuits employing a field gate(s) without dielectric layers and/or work function metal layers for reduced gate layout parasitic resistance, and related methods
#579Method for processing a semiconductor wafer using non-contact electrical measurements indicative of a least one side-to-side short or leakage, at least one via-chamfer short or leakage, and at least one corner short or leakage, where such measurements are obtained from cells with respective side-to-side short, via-chamfer short, and corner short test areas, using a charged particle-beam inspector with beam deflection to account for motion of the stage
#580Methods for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one via-chamfer short or leakage, and at least one corner short or leakage, where such measurements are obtained from cells with respective tip-to-tip short, via-chamfer short, and corner short test areas, using a charged particle-beam inspector with beam deflection to account for motion of the stage
#581Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one tip-to-side short or leakage, and at least one side-to-side short or leakage, where such measurements are obtained from cells with respective tip-to-tip short, tip-to-side short, and side-to-side short test areas, using a charged particle-beam inspector with beam deflection to account for motion of the stage
#582Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one side-to-side short or leakage, at least one corner short or leakage, and at least one via open or resistance, where such measurements are obtained from non-contact pads associated with respective side-to-side short, corner short, and via open test areas
#583Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-side short or leakage, at least one corner short or leakage, and at least one via open or resistance, where such measurements are obtained from non-contact pads associated with respective tip-to-side short, corner short, and via open test areas
#584Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-side short or leakage, at least one chamfer short or leakage, and at least one via open or resistance, where such measurements are obtained from non-contact pads associated with respective tip-to-side short, chamfer short, and via open test areas
#585Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-side short or leakage, at least one chamfer short or leakage, and at least one corner short or leakage, where such measurements are obtained from non-contact pads associated with respective tip-to-side short, chamfer short, and corner short test areas
#586Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one side-to-side short or leakages, and at least one via respective tip-to-tip short, side-to-side short, and via open test areas
#587Method for processing a semiconductor water using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one side-to-side short or leakage, and at least one chamfer short or leakage, where such measurements are obtained from non-contact pads associated with respective tip-to-tip short, side to side short, and chamfer short test areas
#588Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one tip-to-side short or leakage, and at least one corner short or leakage, where such measurements are obtained from non-contact pads associated with respective tip-to-tip short, tip-to-side sort, and corner short test areas
#589Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one tip-to-side short or leakage, and at least one chamfer short or leakage, where such measurements are obtained from non-contact pads associated with respective tip-to-tip short, tip-to-side short, and chamfer short test areas
#590Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one tip-to-side short or leakage, and at least one side-to-side short or leakage, where such measurements are obtained from non-contact pads associated with respective tip-to-tip short, tip-to-side short, and side-to-side short test areas
#591One-time programmable bitcell with diode under anti-fuse
#592Hetero-junction schottky diode device
#593On-chip tuneable diffusion resistor
#594Process for making an integrated circuit that includes NCEM-enabled, interlayer overlap-configured fill cells, with NCEM pads formed from at least three conductive stripes positioned between adjacent gates
#595Integrated circuit including NCEM-enabled, snake-configured fill cells, with NCEM pads formed from at least three conductive stripes positioned between adjacent gates
#596Integrated circuit including NCEM-enabled, via-open/resistance-configured fill cells, with NCEM pads formed from at least three conductive stripes positioned between adjacent gate
#597Process for making an integrated circuit that includes NCEM-Enabled, tip-to-side gap-configured fill cells, with NCEM pads formed from at least three conductive stripes positioned between adjacent gates
#598Integrated circuit including NCEM-enabled, interlayer overlap-configured fill cells, with NCEM pads formed from at least three conductive stripes positioned between adjacent gates
#599Integrated circuit including NCEM-enabled, diagonal gap-configured fill cells, with NCEM pads formed from at least three conductive stripes positioned between adjacent gates
#600Integrated circuit including NCEM-enabled, corner gap-configured fill cells, with NCEM pads formed from at least three conductive stripes positioned between adjacent gates