Tunnel field effect transistor

SILICON CARBIDE SEMICONDUCTOR DEVICE

Asymmetric wedge JFET, related method and design structure

Spin MOSFET and reconfigurable logic circuit

Stress release structures for metal electrodes of semiconductor devices

Asymmetric silicon-on-insulator (SOI) junction field effect transistor (JFET) and a method of forming the asymmetrical SOI JFET

Heterojunction field effect transistor, method for producing heterojunction field effect transistor, and electronic device

Bi-directional circuit breaker

Transistor having thermo electron cooling

Semiconductor device including a normally-on transistor and a normally-off transistor

Method for providing semiconductors having self-aligned ion implant

Compound semiconductor device and manufacturing method thereof

Semiconductor device with group III-V channel and group IV source-drain and method for manufacturing the same

Asymmetric junction field effect transistor

Scalable quantum well device and method for manufacturing the same

Lateral super junction device with high substrate-gate breakdown and built-in avalanche clamp diode

System and method for providing symmetric, efficient bi-directional power flow and power conditioning

Junction field effect transistor

Junction field effect transistor

Methods of fabricating transistors using laser annealing of source/drain regions

Semiconductor device having nickel silicide layer

Methods of forming group III-nitride semiconductor devices including implanting ions directly into source and drain regions and annealing to activate the implanted ions

Field-effect transistor

Power semiconductor device

Solid state circuit breaker

Spin MOSFET and reconfigurable logic circuit

Twin-drain spatial wavefunction switched field-effect transistors

Asymmetric junction field effect transistor

Chemically sensitive field effect transistors and uses thereof in electronic nose devices

Field effect transistor

CMOS compatable fabrication of power GaN transistors on a <100> silicon substrate

Device with polymer layers and two-step self-aligned source etch with large process window

Scalable quantum well device and method for manufacturing the same

METHODS FOR MANUFACTURING A HIGH VOLTAGE JUNCTION FIELD EFFECT TRANSISTOR USING A HYBRID ORIENTATION TECHNOLOGY WAFER

Field effect transistor

Semiconductor device doped with Sb, Ga, or Bi and method of manufacturing the same

Field effect transistor having semiconductor operating layer formed with an inclined side wall

Semiconductor device and method of manufacturing the same

Method for fabricating a semiconductor structure

SPIN FILTER SPINTRONIC DEVICES

Semiconductor device with structured current spread region and method

Field-effect transistor and method of making same

Double gate JFET with reduced area consumption and fabrication method therefor

ENHANCED HOLE MOBILITY P-TYPE JFET AND FABRICATION METHOD THEREFOR

JUNCTION FIELD EFFECT TRANSISTORS IN GERMANIUM AND SILICON-GERMANIUM ALLOYS AND METHOD FOR MAKING AND USING

Polycrystalline SiGe Junctions for advanced devices

Semiconductor device

Spin transistor using stray magnetic field

Semiconductor device having vertical electrodes structure

Two-step self-aligned source etch with large process window

SIC semiconductor device and method for manufacturing the same

Integrated circuit system with double doped drain transistor

JFET with drain and/or source modification implant

Spin transistor using spin-orbit coupling induced magnetic field

Polycrystalline SiGe junctions for advanced devices

Method to improve drive current by increasing the effective area of an electrode

Field-effect transistor with nitride semiconductor and method for fabricating the same

Semiconductor device doped with Sb, Ga or Bi and method of manufacturing the same

Method of fabricating semiconductor devices employing at least one modulation doped quantum well structure and one or more etch stop layers for accurate contact formation

Method of fabricating semiconductor devices employing at least one modulation doped quantum well structure and one or more etch stop layers for accurate contact formation

Field effect transistor and method for fabricating the same

Lowered Source/Drain Transistors

Method to improve drive current by increasing the effective area of an electrode

Polycrystalline SiGe junctions for advanced devices

Semiconductor device

Split source drain transistor

Nano-sheet-based devices with asymmetric source and drain configurations

Method, apparatus, and system for improving scaling of isolation structures for gate, source, and/or drain contacts

Localized tunneling enhancement for semiconductor devices

Integrating a junction field effect transistor into a vertical field effect transistor

Transistors with dielectric-isolated source and drain regions

Transistor with asymmetric spacers

Semiconductor device and method of fabricating the same

HEMT having conduction barrier between drain fingertip and source

Stacked capacitor structure

Conductive contacts in semiconductor on insulator substrate

Vertical single electron transistor formed by condensation

High germanium content FinFET devices having the same contact material for nFET and pFET devices

Reduced current leakage semiconductor device

Silicon carbide static induction transistor and process for making a silicon carbide static induction transistor

Dual epitaxial process including spacer adjustment