ClassID:

208253

H01L29/102 - CPC Classification

Classification description:

Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor; Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes; Base regions of thyristors Cathode base regions of thyristors

Recent Application in this class:
#1
20240162295
2024-05-16

GATE-COMMUTED THYRISTOR CELL WITH A BASE REGION HAVING A VARYING THICKNESS

#2
20240088226
2024-03-14

INSULATED GATE TURN-OFF DEVICE WITH SHORT CHANNEL PMOS TRANSISTOR

#3
20230133016
2023-05-04

Thyristor

#4
20230111333
2023-04-13

Integrated gate-commutated thyristor (IGCT)

#5
20210057415
2021-02-25

Thyristor volatile random access memory and methods of manufacture

#6
20200043930
2020-02-06

Thyristor Volatile Random Access Memory and Methods of Manufacture

#7
20180323197
2018-11-08

Thyristor volatile random access memory and methods of manufacture

#8
20180301455
2018-10-18

Thyristor volatile random access memory and methods of manufacture

#9
20180204913
2018-07-19

Flat gate commutated thyristor

#10
20180097005
2018-04-05

Thyristor volatile random access memory and methods of manufacture

#11
20180090572
2018-03-29

Thyristor with improved plasma spreading

#12
20180061962
2018-03-01

Method for producing a doped semiconductor layer

#13
20170323891
2017-11-09

Method of writing into and refreshing a thyristor volatile random access memory

#14
20170256614
2017-09-07

Vertical insulated gate turn-off thyristor with intermediate p+ layer in p-base

#15
20170025414
2017-01-26

Thyristor volatile random access memory and methods of manufacture

#16
20160284826
2016-09-29

Bipolar non-punch-through power semiconductor device

#17
20160093624
2016-03-31

Thyristor Volatile Random Access Memory and Methods of Manufacture

#18
20150380534
2015-12-31

Power semiconductor device and corresponding module

#19
20150357929
2015-12-10

Gated thyristor power device having a rapid turn off time

#20
20150144997
2015-05-28

Tunable FIN-SCR for robust ESD protection

#21
20150016165
2015-01-15

Gated thyristor power device

#22
20140001514
2014-01-02

Semiconductor Device and Method for Producing a Doped Semiconductor Layer

#23
20130229223
2013-09-05

Tunable fin-SCR for robust ESD protection

#24
20120299054
2012-11-29

Power semiconductor device

#25
20100133549
2010-06-03

Semiconductor devices with current shifting regions and related methods

#26
20080265359
2008-10-30

SEMICONDUCTOR DIVICE

#27
20080164490
2008-07-10

Power semiconductor device

#28
20070131963
2007-06-14

Thyristor which can be triggered electrically and by radiation

#29
20050258448
2005-11-24

Thyristor component with improved blocking capabilities in the reverse direction