208458 ⎘
Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor; Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched; Bipolar devices; Thyristor-type devices, e.g. having four-zone regenerative action with turn-on by field effect
POWER CHIP AND BRIDGE CIRCUIT
#2SEMICONDUCTOR MEMORY DEVICES
#3Cell structure and its related semiconductor device
#4Field-effect transistor
#5Method for fabricating field-effect transistor
#6Semiconductor memory devices
#7Metal oxide semiconductor-controlled thyristor device having uniform turn-off characteristic and method of manufacturing the same
#8Field-effect transistor and method for fabricating the same
#9Neuron circuit using p-n-p-n diode without external bias voltages
#10CAPACITIVE DISCHARGE UNIT FOR FIRESET EMPLOYING SILICON CARBIDE THYRISTOR AS HIGH VOLTAGE SWITCH FOR FUZING EVENT
#11Thyristor volatile random access memory and methods of manufacture
#12Short-circuit semiconductor component and method for operating it
#13Lateral insulated gate turn-off device with induced emitter
#14Vertical thyristor
#15Feedback field-effect electronic device using feedback loop operation and array circuit using feedback field-effect electronic device
#16Thyristor Volatile Random Access Memory and Methods of Manufacture
#17Array of gated devices and methods of forming an array of gated devices
#18Silicon controlled rectifiers integrated into a heterojunction bipolar transistor process
#19Enclosed gate runner for eliminating miller turn-on
#20Array of gated devices and methods of forming an array of gated devices
#21Enclosed gate runner for eliminating miller turn-on
#22Methods of reading and writing data in a thyristor random access memory
#23Thyristor volatile random access memory and methods of manufacture
#24Thyristor volatile random access memory and methods of manufacture
#25Methods of reading and writing data in a thyristor random access memory
#26Electrostatic discharge protection device and manufacturing method thereof
#27Logic semiconductor device
#28Thyristor volatile random access memory and methods of manufacture
#29Neuromorphic devices and circuits
#30Method of writing into and refreshing a thyristor volatile random access memory
#31SOI integrated circuit equipped with a device for protecting against electrostatic discharges
#32Apparatus for rectified RC trigger of back-to-back MOS-SCR ESD protection
#33Array of gated devices and methods of forming an array of gated devices
#34Low-loss and fast acting solid-state breaker
#35Insulated gate semiconductor device with soft switching behavior
#36Lateral-diode, vertical-SCR hybrid structure for high-level ESD protection
#37Transistor structures having reduced electrical field at the gate oxide and methods for making same
#38Thyristor volatile random access memory and methods of manufacture
#39Semiconductor stack for converter with snubber capacitors
#40Insulated gate power device using a MOSFET for turning off
#41Vertical transistor devices for embedded memory and logic technologies
#42Thyristor Volatile Random Access Memory and Methods of Manufacture
#43Thyristors, methods of programming thyristors, and methods of forming thyristors
#44Power semiconductor device and corresponding module
#45Method of manufacturing super junction for semiconductor device
#46Device and method for controlling the turn-off of a solid state switch (SGTO)
#47Thyristor-based memory cells, devices and systems including the same and methods for forming the same
#48Bi-directional ESD protection circuit
#49On-SOI integrated circuit equipped with a device for protecting against electrostatic discharges
#50Edge termination technique for high voltage power devices having a negative feature for an improved edge termination structure
#51Semiconductor element and manufacturing method and operating method of the same
#52Transistor structures having reduced electrical field at the gate oxide and methods for making same
#53Super junction for semiconductor device and method for manufacturing the same
#54MCT device with base-width-determined latching and non-latching states
#55Both carriers controlled thyristor
#56MOS transistor on SOI protected against overvoltages
#57Thyristor-based memory cells, devices and systems including the same and methods for forming the same
#58SCR apparatus and method for adjusting the sustaining voltage
#59Thyristor-based memory cells, devices and systems including the same and methods for forming the same
#60Transistor with A-face conductive channel and trench protecting well region
#61Thyristors
#62Vertical capacitor-less DRAM cell, DRAM array and operation of the same
#63ESD protection structure
#64Power semiconductor device
#65Transistor with A-face conductive channel and trench protecting well region
#66Low side Zener reference voltage extended drain SCR clamps
#67ESD Protection Devices
#68Thyristor based memory cells, devices and systems including the same and methods for forming the same
#69High voltage SCRMOS in BiCMOS process technologies
#70High voltage SCRMOS in BiCMOS process technologies
#71ESD protection apparatus and ESD device therein
#72Electrostatic discharge protection device for high voltage operation
#73Thyristor device with carbon lifetime adjustment implant and its method of fabrication
#74Transistor with A-face conductive channel and trench protecting well region
#75System and method for making a LDMOS device with electrostatic discharge protection
#76ESD protection devices
#77ULTRA DENSE TRENCH-GATED POWER DEVICE WITH THE REDUCED DRAIN-SOURCE FEEDBACK CAPACITANCE AND MILLER CHARGE
#78Method of manufacturing semiconductor device
#79Bipolar mosfet devices and methods for their use
#80Semiconductor device having trench edge termination structure
#81ULTRA DENSE TRENCH-GATED POWER DEVICE WITH REDUCED DRAIN SOURCE FEEDBACK CAPACITANCE AND MILLER CHARGE
#82Electrostatic discharge protection circuit using triple welled silicon controlled rectifier
#83ESD protection element and ESD protection device for use in an electrical circuit
#84TRANSISTOR WITH INCREASED ESD ROBUSTNESS AND RELATED LAYOUT METHOD THEREOF
#85Insulated gate type thyristor
#86Ultra dense trench-gated power device with the reduced drain-source feedback capacitance and Miller charge
#87Memory cell with trenched gated thyristor
#88System and method for making a LDMOS device with electrostatic discharge protection
#89Electro-static discharge protection circuit and method for fabricating the same
#90Electrostatic discharge protection circuit using triple welled silicon controlled rectifier
#91Bi-directional ESD protection circuit
#92Memory cell with trenched gated thyristor
#93Thyristor-type memory device
#94Ultra dense trench-gated power device with the reduced drain-source feedback capacitance and miller charge
#95Solid state turbine engine ignition exciter having elevated temperature operational capability
#96Silicon on insulator read-write non-volatile memory comprising lateral thyristor and trapping layer
#97Semiconductor device with leakage implant and method of fabrication
#98Semiconductor device and manufacturing method thereof
#99Gate structure of thyristor
#100Silicon controlled rectifier