208481 ⎘
Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor; Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched; Unipolar devices, e.g. field effect transistors; Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
Semiconductor device with cobalt silicide contacts
#3602SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
#3603Semiconductor device including a MOSFET having a band-engineered superlattice with a semiconductor cap layer providing a channel
#3604Method for making a semiconductor device including a MOSFET having a band-engineered superlattice with a semiconductor cap layer providing a channel
#3605Low resistance T-gate MOSFET device using a damascene gate process and an innovative oxide removal etch
#3606Transistors for semiconductor device and methods of fabricating the same
#3607Semiconductor device and method for manufacturing the same
#3608Method for making a semiconductor device including a superlattice and adjacent semiconductor layer with doped regions defining a semiconductor junction
#3609Method for making a semiconductor device including a superlattice with regions defining a semiconductor junction
#3610Semiconductor device with a metal insulator semiconductor transistor
#3611Semiconductor apparatus and manufacturing method of the same
#3612Laterally diffused metal oxide semiconductor device and method of forming the same
#3613Method of forming reduced short channel field effect transistor
#3614Method for forming a junction region of a semiconductor device
#3615Salicide process for metal gate CMOS devices
#3616Lightly doped drain MOS transistor
#3617System and method for integration of HfOand RTCVD poly-silicon
#3618Integration of pre-S/D anneal selective nitride/oxide composite cap for improving transistor performance
#3619Bidirectional high voltage switching device and energy recovery circuit having the same
#3620Method of forming a metal gate in a semiconductor device
#3621Ultra-shallow metal oxide surface channel MOS transistor
#3622Structure and method to form source and drain regions over doped depletion regions
#3623Transistor sidewall spacer stress modulation
#3624Integrated circuit device and method therefor
#3625Substrate processing method
#3626Method for forming dual gate electrodes using damascene gate process
#3627Semiconductor device and method of manufacturing the same
#3628Semiconductor device and fabricating method thereof
#3629Semiconductor device and methods of manufacturing the same
#3630Metal contact structure and method of manufacture
#3631Selective post-doping of gate structures by means of selective oxide growth
#3632Method of making strained channel CMOS transistors having lattice-mismatched epitaxial
#3633Method of varying etch selectivities of a film
#3634ESD protection for semiconductor products
#3635Formation of a disposable spacer to post dope a gate conductor
#3636Method for fabricating semiconductor devices having silicided electrodes
#3637Method of making field effect transistors having self-aligned source and drain regions using independently controlled spacer widths
#3638Manufacturing method of semiconductor device
#3639Depletion-merged FET design in bulk silicon
#3640Enhancement of electron and hole mobilities in <110> Si under biaxial compressive strain
#3641Method and apparatus for rapid cooldown of annealed wafer
#3642Methods of forming halo regions in NMOS transistors
#3643Method of fabricating semiconductor device
#3644Methods of fabricating semiconductor devices
#3645Method of fabricating transistor in semiconductor device
#3646Method of fabricating MOS transistor
#3647Semiconductor device having a dual-damascene gate and manufacturing method thereof
#3648Semiconductor device with high dielectric constant insulator and its manufacture
#3649MOS transistor and method of manufacturing the same
#3650MOS transistors and methods of manufacturing the same
#3651Manufacturing method of semiconductor device
#3652Methods of fabricating semiconductor devices
#3653Hydrogen free formation of gate electrodes
#3654Method for manufacturing a MOS transistor having reduced 1/f noise
#3655Reduced hydrogen sidewall spacer oxide
#3656Semiconductor device and method of manufacturing the same
#3657Reduced hydrogen sidewall spacer oxide
#3658Semiconductor device and fabrication method thereof
#3659Method for improving transistor performance through reducing the salicide interface resistance
#3660Doping method and semiconductor device using the same
#3661Method and apparatus for fabricating semiconductor device
#3662MOS field effect transistor with reduced on-resistance
#3663Semiconductor fabrication process with asymmetrical conductive spacers
#3664Methods for manufacturing semiconductor device
#3665Non-silicon semiconductor and high-k gate dielectric metal oxide semiconductor field effect transistors
#3666Reverse metal process for creating a metal silicide transistor gate structure
#3667Methods of fabricating semiconductor device having T-shaped gate and L-shaped spacer
#3668Method of forming a semiconductor device with a high dielectric constant material and an offset spacer
#3669Method for fabricating semiconductor device having high withstand voltage transistor
#3670Modulated trigger device
#3671Method of fabricating semiconductor integrated circuit device
#3672Forming a retrograde well in a transistor to enhance performance of the transistor
#3673Method for introducing hydrogen into a channel region of a metal oxide semiconductor (MOS) device
#3674Method of forming high voltage metal oxide semiconductor transistor
#3675Method for making semiconductor device comprising a superlattice with upper portions extending above adjacent upper portions of source and drain regions
#3676Semiconductor device and method of manufacturing thereof
#3677Complementary field-effect transistors and methods of manufacture
#3678Method of forming ultra-thin silicidation-stop extensions in mosfet devices
#3679Method of manufacturing a semiconductor device having a gate structure with low parasitic capacitance
#3680Semiconductor device comprising a superlattice with upper portions extending above adjacent upper portions of source and drain regions
#3681Semiconductor device having metal silicide layer on source/drain region and gate electrode and method of manufacturing the same
#3682Semiconductor device and its manufacturing method
#3683Encapsulated MOS transistor gate structures and methods for making the same
#3684Method of forming a field effect transistor
#3685Method of fabricating a lateral double-diffused MOSFET
#3686RFID tag with tunable antenna and associated reader
#3687Method of forming fet with T-shaped gate
#3688Semiconductor device and manufacturing method thereof
#3689High voltage transistor and method of manufacturing the same
#3690Display device having a thin film transistor
#3691Methods of forming field effect transistor gate lines
#3692Semiconductor device and manufacturing method thereof
#3693Non-volatile semiconductor memory and method of making same, and semiconductor device and method of making device
#3694Drain/source extension structure of a field effect transistor including doped high-k sidewall spacers
#3695Method of improving short channel effect and gate oxide reliability by nitrogen plasma treatment before spacer deposition
#3696Technique for forming a transistor having raised drain and source regions with a reduced number of process steps
#3697MOS transistors having recesses with elevated source/drain regions
#3698Method of forming field effect transistors
#3699Semiconductor device and method of fabricating the same
#3700Methods for fabricating a triple-gate MOSFET transistor
#3701Method of forming an NMOS transistor and structure thereof
#3702Method of forming a field effect transistor
#3703Ultra-shallow junction MOSFET having a high-k gate dielectric and in-situ doped selective epitaxy source/drain extensions and a method of making same
#3704Method and structure for forming strained Si for CMOS devices
#3705Fully silicided NMOS device for electrostatic discharge protection
#3706Method for manufacturing MOS transistor and semiconductor device employing MOS transistor made using the same
#3707Reducing dopant losses during annealing processes
#3708Field effect transistor and manufacturing method thereof
#3709Strained silicon structure
#3710Silicide formation for a semiconductor device
#3711Non-volatile semiconductor memory and method of making same, and semiconductor device and method of making device
#3712Method for making a semiconductor device comprising a superlattice channel vertically stepped above source and drain regions
#3713Semiconductor device and method of forming the same
#3714Semiconductor device formed on (111) surface of a Si crystal and fabrication process thereof
#3715Semiconductor device and manufacturing method thereof
#3716Semiconductor device and method for fabricating the same
#3717Semiconductor devices having dual spacers and methods of fabricating the same
#3718Semiconductor device including a MOSFET with nitride side wall
#3719Method for making a semiconductor device including band-engineered superlattice having 3/1-5/1 germanium layer structure
#3720Semiconductor device comprising a superlattice channel vertically stepped above source and drain regions
#3721Semiconductor device including band-engineered superlattice having 3/1-5/1 germanium layer structure
#3722Self-aligned silicide process for preventing electrical shorts
#3723Method for fabricating a gate structure of a FET and gate structure of a FET
#3724Methods of forming electronic devices including high-k dielectric layers and electrode barrier layers
#3725Multi-finger transistor
#3726Strained channel transistor formation
#3727Encapsulated MOS transistor gate structures and methods for making the same
#3728Semiconductor device and production method therefor
#3729Method for manufacturing semiconductor integrated circuit device
#3730Method of fabricating a metal oxide semiconductor field effect transistor and a metal oxide semiconductor field effect transistor
#3731High-K gate dielectric stack plasma treatment to adjust threshold voltage characteristics
#3732Methods for manufacturing stacked gate structure and field effect transistor provided with the same
#3733Dual fully-silicided gate MOSFETs
#3734Method of manufacturing metal-oxide-semiconductor transistor
#3735Method and apparatus for using cobalt silicided polycrystalline silicon for a one time programmable non-volatile semiconductor memory
#3736Semiconductor device including field-effect transistor using salicide (self-aligned silicide) structure and method of fabricating the same
#3737Semiconductor device with silicide film and method of manufacturing the same
#3738Reduction of channel hot carrier effects in transistor devices
#3739Semiconductor device having an angled compensation implant and method of manufacture therefor
#3740CMOS transistors and methods of forming same
#3741Integration of pre-S/D anneal selective nitride/oxide composite cap for improving transistor performance
#3742Masked spacer etching for imagers
#3743Method of producing an imaging device
#3744Semiconductor device
#3745Structure and method of making strained channel CMOS transistors having lattice-mismatched epitaxial extension and source and drain regions
#3746High withstand-voltage semiconductor device
#3747Method for fabricating a semiconductor device having salicide
#3748Method of manufacturing a semiconductor device
#3749Semiconductor device and method for manufacturing the same
#3750Method for manufacturing semiconductor device including heat treating with a flash lamp
#3751Semiconductor device including sidewall floating gates
#3752Semiconductor device with silicon-germanium gate electrode and method for manufacturing thereof
#3753Structure and method to fabricate self-aligned transistors with dual work function metal gate electrodes
#3754Semiconductor device including a MISFET and a MIS capacitor
#3755Complementary junction-narrowing implants for ultra-shallow junctions
#3756Semiconductor circuit constructions
#3757Method for preparing a source material including forming a paste for ion implantation
#3758Oxide-Nitride-Oxide spacer with oxide layers free of nitridization
#3759integrating n-type and P-type metal gate transistors
#3760Resist protect oxide structure of sub-micron salicide process
#3761Semiconductor transistors and methods of fabricating the same
#3762Isolation structure with nitrogen-containing liner and methods of manufacture
#3763Damascene gate process
#3764Fabrication method and device structure of shallow trench insulation for silicon wafer containing silicon-germanium
#3765Strained silicon MOS devices
#3766Method for manufacturing a semiconductor device and a semiconductor device manufactured thereby
#3767Semiconductor device and method of manufacturing the same
#3768Method for making an integrated circuit comprising a waveguide having an energy band engineered superlattice
#3769Method for making an integrated circuit comprising an active optical device having an energy band engineered superlattice
#3770Integrated circuit comprising a waveguide having an energy band engineered superlattice
#3771MOS transistor and fabrication method thereof
#3772Integrated circuit comprising an active optical device having an energy band engineered superlattice
#3773Method for making electronic device comprising active optical devices with an energy band engineered superlattice
#3774Electronic device comprising active optical devices with an energy band engineered superlattice
#3775Methods of forming hafnium oxide
#3776Method of manufacturing semiconductor device and semiconductor device manufactured using the same
#3777Technique for forming recessed sidewall spacers for a polysilicon line
#3778Polysilicon line having a metal silicide region enabling linewidth scaling including forming a second metal silicide region on the substrate
#3779Formation of standard voltage threshold and low voltage threshold MOSFET devices
#3780Methods of forming semiconductor logic circuitry, and semiconductor logic circuit constructions
#3781Methods of forming semiconductor circuitry
#3782Semiconductor device having an organic anti-reflective coating (ARC) and method therefor
#3783Methods of forming a semiconductor device having a metal gate electrode and associated devices
#3784SOI device with reduced drain induced barrier lowering
#3785Transistor sidewall spacer stress modulation
#3786Method of manufacturing a semiconductor integrated circuit device
#3787Method and system for determining a component concentration of an integrated circuit feature
#3788Nitrogen controlled growth of dislocation loop in stress enhanced transistor
#3789Semiconductor device and method of manufacturing the same
#3790Semiconductor device having a diffusion layer and a manufacturing method thereof
#3791Semiconductor device including band-engineered superlattice
#3792Nitrogen controlled growth of dislocation loop in stress enhanced transistor
#3793Self-aligned MOSFET having an oxide region below the channel
#3794Semiconductor component and method of manufacture
#3795System for removal of a spacer
#3796Method for removal of a spacer
#3797MOS transistor and ESD protective device each having a settable voltage ratio of the lateral breakdown voltage to the vertical breakdown voltage
#3798Devices and methods for compact radiation-hardened integrated circuits
#3799Left-ISD-LTSEE {low electrostatic field transistor (LEFT) using implanted S/D and selective low temperature epitaxial extension (ISD-LTSEE)}
#3800Devices and methods for compact radiation-hardened integrated circuits
#3801Semiconductor device structure
#3802Transistor with implant screen
#3803Radio frequency (RF) switch with improved power handling
#3804Memory structure
#3805Stacked nanosheets with self-aligned inner spacers and metallic source/drain
#3806Semiconductor devices with same conductive type but different threshold voltages and method of fabricating the same
#3807Non-volatile memory of semiconductor device and method for manufacturing the same
#3808High voltage MOS structure and its manufacturing method
#3809Semiconductor structure and manufacturing method of the same
#3810Fully depleted silicon on insulator integration
#3811Semiconductor device and method of fabricating thereof
#3812Semiconductor device and method of making
#3813Semiconductor device and method for fabricating the same
#3814Semiconductor variable resistor and semiconductor manufacturing method thereof
#3815Resistive three-dimensional memory device with heterostructure semiconductor local bit line and method of making thereof
#3816Integrated LDMOS and VFET transistors
#3817Anti-fuse one-time programmable memory cell and anti-fuse one-time programmable memory array
#3818Semiconductor MOS device having a dense oxide film on a spacer
#3819Field effect transistor structure and manufacturing method thereof
#3820Three-dimensional memory device having a heterostructure quantum well channel
#3821Reduced current leakage semiconductor device
#3822Semiconductor device having weak current channel
#3823Tipless transistors, short-tip transistors, and methods and circuits therefor
#3824FinFET extension regions
#3825High-k dielectric device and process
#3826Methods for forming FinFETs with reduced series resistance
#3827Metal oxide semiconductor field effect transistor with reduced surface field folding
#3828Metal oxide semiconductor field effect transistor with reduced surface field folding
#3829Transistor having reduced junction leakage and methods of forming thereof
#3830High-k dielectric device and process