208493 ⎘
Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor; Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched; Unipolar devices, e.g. field effect transistors; Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with Schottky drain or source contact
FIELD EFFECT TRANSISTOR WITH P-FET TYPE BEHAVIOUR
#2SILICON CARBIDE SEMICONDUCTOR DEVICE
#3Method for preparing semiconductor device with contact structure
#4SIC MOSFET WITH BUILT-IN SCHOTTKY DIODE
#5SEMICONDUCTOR TEST STRUCTURE AND METHOD FOR MANUFACTURING SAME
#6Semiconductor device with contact structure and method for preparing the same
#7SiC MOSFET with built-in Schottky diode
#8Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
#9Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
#10Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
#11Method for depinning the fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
#12Method of manufacturing a semiconductor device
#13Systems and methods for unipolar charge balanced semiconductor power devices
#14Method for depinning the fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
#15Method for depinning the fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
#16Semiconductor device and corresponding manufacturing method
#17Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
#18Method for depinning the fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
#19NON-VOLATILE SCHOTTKY BARRIER FIELD EFFECT TRANSISTOR
#20Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
#21Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
#22Preparation method of a germanium-based schottky junction
#23Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
#24SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
#25Schottky diodes
#26Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
#27Method for forming a Schottky diode
#28Method for depinning the fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
#29Forming of the periphery of a schottky diode with MOS trenches
#30Stable PD-SOI devices and methods
#31Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
#32Forming of the periphery of a schottky diode with MOS trenches
#33Stable PD-SOI devices and methods
#34Stable PD-SOI devices and methods