212503 ⎘
Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by; Details of semiconductor or other solid state devices to be connected; Device type Passive devices, e.g. 2 terminal devices
Sub-classes:PACKAGE HAVING COMPONENT CARRIER AND EMBEDDED OPTICAL AND ELECTRIC CHIPS WITH HORIZONTAL SIGNAL PATH IN BETWEEN
#2SEMICONDUCTOR DEVICE
#3CHIP PACKAGE ASSEMBLY WITH ON-PACKAGE CONTAINMENT SYSTEM
#4INTEGRATED CIRCUIT PACKAGE AND METHOD
#5Structure and Method for Fabricating a Computing System with an Integrated Voltage Regulator Module
#6SEMICONDUCTOR PACKAGE
#7SEMICONDUCTOR DEVICE
#8POWER MODULE WITH IMPROVED SEMICONDUCTOR DIE ARRANGEMENT FOR ACTIVE CLAMPING
#9Integrated circuit package and method
#10Electric Circuit Body and Power Conversion Device
#11Structure and Method for Fabricating a Computing System with an Integrated Voltage Regulator Module
#12PRINTED CIRCUIT BOARD
#13POWER SEMICONDUCTOR MODULE COMPRISING SWITCH ELEMENTS AND DIODES
#14SEMICONDUCTOR DEVICE
#15Structure and method for fabricating a computing system with an integrated voltage regulator module
#16SEMICONDUCTOR DEVICE
#17Integrated circuit package and method
#18Devices and methods related to stack structures including passivation layers for distributing compressive force
#19Semiconductor device and method of forming ultra high density embedded semiconductor die package
#20Switch device having a pulldown transistor and a voltage clamp
#21Semiconductor device
#22Integrated circuit package and method
#23Device assembly structure and method of manufacturing the same
#24Transformer-based driver for power switches
#25Structure and method for fabricating a computing system with an integrated voltage regulator module
#26METHOD FOR MOUNTING COMPONENT
#27Semiconductor device
#28Method for fabricating a semiconductor device comprising a paste layer and semiconductor device
#29Light-emitting/receiving device and light-detecting method
#30Semiconductor package structure and manufacturing method thereof
#31Electronic packaging structure
#32Printing complex electronic circuits using a printable solution defined by a patterned hydrophobic layer
#33Semiconductor package structure and manufacturing method thereof
#34FLIP-CHIP, FACE-UP AND FACE-DOWN CENTERBOND MEMORY WIREBOND ASSEMBLIES
#35Semiconductor device and method of forming ultra high density embedded semiconductor die package
#36Printing complex electronic circuits using a patterned hydrophobic layer
#37Method for forming complex electronic circuits by interconnecting groups of printed devices
#38System in package
#39Pillar design for conductive bump
#40Low profile integrated circuit (IC) package comprising a plurality of dies
#41Fan out system in package and method for forming the same
#42Semiconductor package and manufacturing method thereof
#43Structure of battery protection circuit module package coupled with holder, and battery pack having same
#44Stack structures in electronic devices including passivation layers for distributing compressive force
#45Semiconductor package
#46Semiconductor device and method of fabricating same
#47Device electrode formation using metal sheet
#48Silicon shield for package stress sensitive devices
#49Plurality of semiconductor devices in resin with a via
#50Semiconductor device having semiconductor chips in resin and electronic circuit device with the semiconductor device
#51Semiconductor device package and method of the same
#52CHIP PACKAGE STRUCTURE
#53Integrated circuit package
#54Stacked semiconductor system having interposer of half-etched and molded sheet metal
#55Semiconductor device
#56Semiconductor package
#57Semiconductor device including multiple semiconductor chips and a laminate
#58Flip-chip, face-up and face-down centerbond memory wirebond assemblies
#59Thin integrated circuit chip-on-board assembly
#60Carrier-bonding methods and articles for semiconductor and interposer processing
#61Microelectronic Assembly With Thermally and Electrically Conductive Underfill
#62Thin wafer handling and known good die test method
#63Pillar design for conductive bump
#64Pillar design for conductive bump
#65Flip-chip, face-up and face-down centerbond memory wirebond assemblies
#66Semiconductor package
#67Integrated circuit packaging system with post and method of manufacture thereof
#68Chip scale package and fabrication method thereof
#69Fiducial scheme adapted for stacked integrated circuits
#70Through-substrate vias (TSVs) electrically connected to a bond pad design with reduced dishing effect
#71Fiducial scheme adapted for stacked integrated circuits
#72Structure and method for fabricating a computing system with an integrated voltage regulator module
#73Structure and method for fabricating a computing system with an integrated voltage regulator module