Semiconductor-on-insulator with back side connection

MICROWAVE UNIT AND METHOD THEREFORE

DEVICE MOUNTING BOARD AND METHOD OF MANUFACTURING THE SAME, SEMICONDUCTOR MODULE, AND MOBILE DEVICE

Flexible circuit assembly without solder

Biocompatible packaging

Semiconductor Device and Method of Forming Narrow Interconnect Sites on Substrate with Elongated Mask Openings

Semiconductor device and manufacturing method therefor

On-Chip RF shields with front side redistribution lines

Packaged semiconductor device with encapsulant embedding semiconductor chip that includes contact pads

Circuit board, and semiconductor device having component mounted on circuit board

RESIN COMPOSITION FOR ENCAPSULATING SEMICONDUCTOR AND SEMICONDUCTOR DEVICE USING THE RESIN COMPOSITION

Integrated circuit package system with post-passivation interconnection and integration

Device with post-contact back end of line through-hole via integration

Semiconductor chip with reinforcing through-silicon-vias

Semiconductor device and a method of manufacturing the same

Semiconductor-on-insulator with back side strain inducing material

RFID integrated circuit with integrated antenna structure

SINGLE-PACKAGE WIRELESS COMMUNICATION DEVICE

IC device having low resistance TSV comprising ground connection

Stacked semiconductor device

Semiconductor module having deflecting conductive layer over a spacer structure

Semiconductor device having a vertical interconnect structure using stud bumps

Embedded semiconductor die package and method of making the same using metal frame carrier

Interconnection structure

Semiconductor device and method of forming sacrificial protective layer to protect semiconductor die edge during singulation

Package-on-package using through-hole via die on saw streets

Semiconductor package with cantilever leads

Extended under-bump metal layer for blocking alpha particles in a semiconductor device

Integrated shunt resistor with external contact in a semiconductor package

Sensor device having electrode draw-out portions through side of substrate

Vertical discrete device with drain and gate electrodes on the same surface and method for making the same

3D semiconductor device

Semiconductor device and method of forming stud bumps over embedded die

3D integrated circuit with logic

Stacked digital/RF system-on-chip with integral isolation layer

3D semiconductor device

INPUT/OUTPUT CORE DESIGN AND METHOD OF MANUFACTURE THEREFOR

3D semiconductor device including field repairable logics

IC device having low resistance TSV comprising ground connection

Method to form a 3D semiconductor device

Dual molded multi-chip package system

OHMIC CONNECTION USING WIDENED CONNECTION ZONES IN A PORTABLE ELECTRONIC OBJECT

3D integrated circuit structure and method for manufacturing the same

Semiconductor device and method of manufacturing the semiconductor device

STACKED DIE PACKAGES WITH FLIP-CHIP AND WIRE BONDING DIES

3D integration method using SOI substrates and structures produced thereby

Method of fabricating a semiconductor device and structure

3D semiconductor device

3D semiconductor device

Electronic system with expansion feature

Flow sensors having nanoscale coating for corrosion resistance

Integrated structures of high performance active devices and passive devices

Area efficient through-hole connections

Methods for Fabricating Integrated Passive Devices on Glass Substrates

Data carrier for contactless data transmission and a method for producing such a data carrier

Semiconductor device and method for forming semiconductor package having build-up interconnect structure over semiconductor die with different CTE insulating layers

Injection molding system and method of chip package

Semiconductor device and method of forming B-stage conductive polymer over contact pads of semiconductor die in Fo-WLCSP

Low noise flip-chip packages and flip chips thereof

Packaged semiconductor device for high performance memory and logic

Direct edge connection for multi-chip integrated circuits

Three-dimensional integrated circuits with protection layers

Memory device and method of manufacturing the same

Semiconductor device and method of forming a fan-out structure with integrated passive device and discrete component

Semiconductor device and method of forming FO-WLCSP with multiple encapsulants

Device including two semiconductor chips and manufacturing thereof

Semiconductor package and method for fabricating the same

Forming semiconductor chip connections

Semiconductor chip module, semiconductor package having the same and package module

Semiconductor device and method of forming column interconnect structure to reduce wafer stress

Structures for improving current carrying capability of interconnects and methods of fabricating the same

Semiconductor package and method for manufacturing semiconductor package

Thermally enhanced semiconductor package system

Semiconductor device including one or more stiffening elements

SEMICONDUCTOR MODULE

DIRECT THROUGH VIA WAFER LEVEL FANOUT PACKAGE

Using backside passive elements for multilevel 3D wafers alignment applications

Contact Arrangement For Establishing A Spaced, Electrically Conducting Connection Between Microstructured Components

DEVICE ALLOWING SUPPRESSION OF STRESS ON CHIP

Reflow apparatus, a reflow method, and a manufacturing method of a semiconductor device

Carrier tape for tab-package and manufacturing method thereof

Method for manufacturing wiring board for mounting electronic component, wiring board for mounting electronic component, and method for manufacturing wiring board having an electronic component

Structure of electrolessly palladium and gold plated films and process for making the same, assembled structure of palladium and gold plated films bonded with copper or copper-palladium wire and assembling process therefore

Removing material from defective opening in glass mold and related glass mold for injection molded solder

APPARATUS FOR WAFER-TO-WAFER BONDING

Accurate alignment for stacked substrates

Method for forming chip package

Method for bonding of chips on wafers

Method of manufacturing semiconductor device

Method of room temperature covalent bonding

CONDUCTIVE CONNECTING MATERIAL, METHOD FOR CONNECTING TERMINALS AND METHOD FOR PRODUCING CONNECTION TERMINAL

DRAM device with built-in self-test circuitry

Method of making an electronic device having a liquid crystal polymer solder mask laminated to an interconnect layer stack and related devices

Method of making an electronic device having a liquid crystal polymer solder mask and related devices

Method of transferring and electrically joining a high density multilevel thin film to a circuitized and flexible organic substrate and associated devices

Board module and fabrication method thereof

Shared Electrostatic Discharge Protection For Integrated Circuits, Integrated Circuit Assemblies And Methods For Protecting Input/Output Circuits

Semiconductor device and method of manufacture thereof

Semiconductor chip and method for fabricating the same

Method for making multilayer connection structure

Forming through-silicon-vias for multi-wafer integrated circuits

Package carrier and manufacturing method thereof

PACKAGE STRUCTURE, PACKAGING SUBSTRATE AND CHIP

Method of forming vertically offset bond on trace interconnects on recessed and raised bond fingers

Semiconductor Device and Method of Forming Bond Wires and Stud Bumps in Recessed Region of Peripheral Area around the Device for Electrical Interconnection to Other Devices

Packaging substrate with conductive structure

Materials, structures and methods for microelectronic packaging

Stacked half-bridge package with a current carrying layer

IC package and method for manufacturing the same

SEMICONDUCTOR DEVICE PACKAGE WITH TWO COMPONENT LEAD FRAME

POWER SEMICONDUCTOR DEVICE PACKAGING

Semiconductor die package and method for making the same

Stacked half-bridge package with a common conductive leadframe

Semiconductor device and method of stacking die on leadframe electrically connected by conductive pillars

Chip package and method for forming the same

Apparatus and methods for constructing semiconductor chip packages with silicon space transformer carriers

Semiconductor devices having insulating substrates and methods of formation thereof

Stacked half-bridge package with a common conductive clip

Package carrier and manufacturing method thereof

Multilayer printed wiring board

Multilayer pillar for reduced stress interconnect and method of making same

Increasing dielectric strength by optimizing dummy metal distribution

Dummy metal design for packaging structures

Method of forming metal pillar

Manufacturing method of semiconductor device

Semiconductor device having a semiconductor chip, and method for the production thereof

Device including two mounting surfaces

Nitride crystal with removable surface layer and methods of manufacture

Routable array metal integrated circuit package fabricated using partial etching process

Chip Scale Package structure with can attachment

WAFER-TO-WAFER STACK WITH SUPPORTING PEDESTAL

METHOD FOR FORMING AN OVER PAD METALIZATION (OPM) ON A BOND PAD

Laser hammering technique for aligning members of a constructed array of optoelectronic devices

Apparatus and methods for packaging integrated circuit chips with antennas formed from package lead wires

Test contact system for testing integrated circuits with packages having an array of signal and power contacts

Alignment marks to enable 3D integration

SEMICONDUCTOR DEVICE, SEMICONDUCTOR PACKAGE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

Semiconductor package

METHOD OF POST-MOLD GRINDING A SEMICONDUCTOR PACKAGE

Semiconductor device and method of forming integrated passive device

Warpage control features on the bottomside of TSV die lateral to protruding bottomside tips

Thermal enhanced package using embedded substrate

Semiconductor device and method of forming no-flow underfill material around vertical interconnect structure

Semiconductor device and method of forming conductive pillars in recessed region of peripheral area around the device for electrical interconnection to other devices

Semiconductor device and method of dissipating heat from thin package-on-package mounted to substrate

Semiconductor device and method for manufacturing the same

Achieving mechanical and thermal stability in a multi-chip package

Method for the production of an electronic component and electronic component produced according to this method

Semiconductor device having separated heatsink and chip mounting portion

Semiconductor device

Wiring device for semiconductor device, composite wiring device for semiconductor device, and resin-sealed semiconductor device

Method of manufacturing semiconductor apparatus, the semiconductor apparatus, and ignitor using the semiconductor apparatus

Semiconductor packages having lead frames

Semiconductor device and method of forming IPD on molded substrate

Semiconductor package with semiconductor core structure and method of forming same

Methods and materials useful for chip stacking, chip and wafer bonding

Method of manufacturing LED light bar and manufacturing equipment thereof

Solder joint reflow process for reducing packaging failure rate

RF IDENTIFICATION DEVICE WITH NEAR-FIELD-COUPLED ANTENNA

Integrated circuit chip and fabrication method

INTEGRATED CIRCUIT PACKAGE AND METHOD OF MAKING SAME

Semiconductor packages and methods of fabricating the same

METHOD OF MANUFACTURING A MULTILAYER PRINTED WIRING BOARD FOR PROVIDING AN ELECTRONIC COMPONENT THEREIN

Field barrier structures within a conformal shield

Substrate assembly provided with capacitive interconnections, and manufacturing method thereof

Folded stacked package and method of manufacturing the same

BARRIER DIODE FOR INPUT POWER PROTECTION

Semiconductor device and a method of manufacturing the same

Semiconductor device and method of forming three-dimensional vertically oriented integrated capacitors

Thin wafer protection device

CONTROLLING DENSITY OF PARTICLES WITHIN UNDERFILL SURROUNDING SOLDER BUMP CONTACTS

Copper pillar full metal via electrical circuit structure

Methods and designs for localized wafer thinning

Chip package structure and chip packaging process

Through hole via filling using electroless plating

Through hole via filling using electroless plating

Stackable electronic package and method of making same

Chip package and method for forming the same

Plasma treatment on semiconductor wafers

INTEGRATED CIRCUIT DEVICE AND METHOD FOR PREPARING THE SAME

Flip chip device having simplified routing

Wafer level molding structure

Carbon nanotube structures for enhancement of thermal dissipation from semiconductor modules

Semiconductor package and method of manufacturing the same

Chip assembly with frequency extending device

Semiconductor device

High power semiconductor package with conductive clip and flip chip driver IC with integrated control transistor

High power semiconductor package with conductive clips and flip chip driver IC

High power semiconductor package with multiple conductive clips

High power semiconductor package with conductive clip on multiple transistors

High power semiconductor package with conductive clip

Leadless semiconductor package with routable leads, and method of manufacture

Semiconductor package and method of fabricating the same

Semiconductor packages

Semiconductor device and method of forming open cavity in TSV interposer to contain semiconductor die in WLCSMP

Semiconductor electronic device with an integrated device with an integrated galvanic isolator element and related assembly process

Pressure sensor and method of packaging same

Anti-reflection structures for CMOS image sensors

ADHESIVE COMPOSITION

Optical semiconductor device having pre-molded leadframe with window and method therefor

RF identification device with near-field-coupled antenna

Embedded capacitor substrate module

Fabrication of through-silicon vias on silicon wafers

Fabrication of through-silicon vias on silicon wafers

Method of manufacturing a light emitting, power generating or other electronic apparatus

Method of manufacturing a printable composition of a liquid or gel suspension of diodes

Ultrasonic wire bonding method for a semiconductor device

Three-dimensional semiconductor device

IC having viabar interconnection and related method

BOND PACKAGE AND APPROACH THEREFOR

Vertically integrated systems

MODULE IC PACKAGE STRUCTURE WITH ELECTRICAL SHIELD FUNCTION AND METHOD FOR MAKING THE SAME

Scalable heat dissipating microelectronic integration platform (SHDMIP) for lighting solutions and method of manufacturing thereof

Printable composition of a liquid or gel suspension of diodes

Method for producing vias in fan-out wafers using dry film and conductive paste, and a corresponding semiconductor package

Multi-chip package having a substrate with a plurality of vertically embedded die and a process of forming the same

Device packaging with substrates having embedded lines and metal defined pads

BALL GRID ARRAY METHOD AND STRUCTURE

Area array semiconductor device package interconnect structure with optional package-to-package or flexible circuit to package connection

Substrate with embedded stacked through-silicon via die

Three-dimensional system-in-package package-on-package structure

Template wafer and process for small pitch flip-chip interconnect hybridization

Semiconductor device, and inspection method thereof

Trap rich layer for semiconductor devices

Semiconductor package

Semiconductor device and method for manufacturing the same

Method for producing an integrated circuit and resulting film chip

Semiconductor device and method of forming integrated passive device over semiconductor die with conductive bridge and fan-out redistribution layer

Semiconductor power device having a super-junction structure

Semiconductor device including capacitor under pad

Apparatus with light emitting or absorbing diodes

Printable composition of a liquid or gel suspension of diodes

Method and apparatus of fabricating a pad structure for a semiconductor device

Diode for a printable composition

Diode for a printable composition

Integrated circuit package architecture

Method for connecting a plurality of unpackaged substrates

Lower IC Package Structure for Coupling with an Upper IC Package to Form a Package-On-Package (PoP) Assembly and PoP Assembly Including Such a Lower IC Package Structure

High-speed, high-resolution electrophysiology in-vivo using conformal electronics

Chip pad resistant to antenna effect and method

Method of forming a ring-shaped metal structure

Semiconductor chip assembly and method for making same

FLEXIBLE CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF

Integrated millimeter wave transceiver

Electronic component and corresponding production method

Crystal oscillator and method of manufacturing the same

High-frequency power amplifier device

Semiconductor device, and method for supplying electric power to same

Semiconductor package and manufacturing method therefor

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

Semiconductor device with thin profile WLCSP with vertical interconnect over package footprint

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Semiconductor device and method of forming the same

Integrated circuit having a three dimensional stack package structure

Forming die backside coating structures with coreless packages

Semiconductor package having proximity communication signal input terminals and manufacturing methods thereof

Simultaneous wafer bonding and interconnect joining

Light emitting semiconductor element bonded to a base by a silver coating

Methods for directly bonding together semiconductor structures, and bonded semiconductor structures formed using such methods

Method of assembling two integrated circuits and corresponding structure

Semiconductor device and method of providing Z-interconnect conductive pillars with inner polymer core

SEMICONDUCTOR DEVICE AND SEMICONDUCTOR PACKAGE

BGA package structure and method for fabricating the same

Elimination of RDL using tape base flip chip on flex for die stacking

Semiconductor device with thin profile WLCSP with vertical interconnect over package footprint

Localized alloying for improved bond reliability

Method for chip scale package and package structure thereof

IC device having electromigration resistant feed line structures

Semiconductor package manufacturing method and semiconductor package

Metallic thermal joint for high power density chips

Double-Sided Semiconductor Device and Method of Forming Top-Side and Bottom-Side Interconnect Structures

Self-organizing network with chip package having multiple interconnection configurations

Microelectronic flip chip packages with solder wetting pads and associated methods of manufacturing

Packaged semiconductor chips with array

Tuning the efficiency in the transmission of radio-frequency signals using micro-bumps

3D integrated circuit device fabrication with precisely controllable substrate removal

Void-free wafer bonding using channels

Integrated circuit for detecting defects of through chip via

Metal paste with co-precursors

Metal paste with oxidizing agents

SEED LAYER DEPOSITION IN MICROSCALE FEATURES

WIRING BOARD AND METHOD OF MANUFACTURING THE SAME

Force sensor

3D integrated circuit device fabrication with precisely controllable substrate removal

Electronic assemblies including mechanically secured protruding bonding conductor joints

Pre-bonded substrate for integrated circuit package and method of making the same

Vented die and package

FOUR MOSFET FULL BRIDGE MODULE

Method and system for template assisted wafer bonding

Method for manufacturing heat dissipation bulk of semiconductor device

Integrated circuit package connected to a data transmission medium

Networking packages based on interposers

Semiconductor device and method of manufacturing the same

Integrated circuit packaging system with interposer

Integrated circuit packaging system with bump conductors and method of manufacture thereof

Semiconductor device with wireless communication

Method for packaging semiconductor dies having through-silicon vias

Semiconductor device and method of forming openings through insulating layer over encapsulant for enhanced adhesion of interconnect structure

Integrated circuit packaging system with vertical interconnection and method of manufacture thereof

Semiconductor wiring patterns