Mounting structure and method for producing mounting structure

EMI shielding composition and process for applying it

Contactless communication unit connector assemblies with signal directing structures

Stacked die integrated circuit

Semiconductor device having conductive shield layer

Semiconductor device having a plurality of chips being stacked

Package-on-package semiconductor assembly having bottom device confined by dielectric recess

Semiconductor package structure and method for forming the same

Bonding structure for semiconductor package and method of manufacturing the same

Semiconductor device

Formation of solder and copper interconnect structures and associated techniques and configurations

Antenna in embedded wafer-level ball-grid array package

Multi-layer ground shield structure of interconnected elements

Connection patterns for high-density device packaging

Three-dimensional integrated circuit laminate, and interlayer filler for three-dimensional integrated circuit laminate

Semiconductor device

Semiconductor device and method for manufacturing the same

Carrier structure, packaging substrate, electronic package and fabrication method thereof

Semiconductor package

Redistribution lines having stacking vias

Synchronous dynamic random access memory (SDRAM) and memory controller device mounted in single system in package (SIP)

Devices and methods related to radio-frequency filters on silicon-on-insulator substrate

3D MRAM with through silicon vias or through silicon trenches magnetic shielding

Package on-package (PoP) structure including stud bulbs

Solid state drive package and data storage system including the same

Multichip module including surface mounting part embedded therein

Electric magnetic shielding structure in packages

Self shielded system in package (SiP) modules

Fan-out POP structure with inconsecutive polymer layer

Fan-out wafer level packaging structure

Pre-package and methods of manufacturing semiconductor package and electronic device using the same

Module substrate

Imaging device, operating method thereof, and electronic device

Electronic device module and method of manufacturing the same

Electronic component device

Semiconductor device and method of manufacture

Multi-die semiconductor structure with intermediate vertical side chip and semiconductor package for same

Microelectronic assemblies formed using metal silicide, and methods of fabrication

Microelectronic assemblies with cavities, and methods of fabrication

Interposer and circuit substrate

Interposers, semiconductor devices, method for manufacturing interposers, and method for manufacturing semiconductor devices

Semiconductor device

Methods for producing integrated circuits with interposers and integrated circuits produced from such methods

3D IC bump height metrology APC

Capacitor sensor structure, circuit board structure with capacitor sensor, and package structure of capacitive sensor

Stacked semiconductor device assembly in computer system

Integrated fan-out structure with openings in buffer layer

Solid-state drive

Embedded die-down package-on-package device

Electronic apparatus and method for fabricating the same

Thin recon interposer package without TSV for fine input/output pitch fan-out

Semiconductor device and method of manufacturing the same

Insulated die

Semiconductor chip including chip pad, redistribution wiring test pad, and redistribution wiring connection pad

Three-dimensional flash memory system

Semiconductor device package having an oscillator and an apparatus having the same

Electronic component and use thereof

Method for manufacturing semiconductor device

Semiconductor package and method for fabricating the same

Chip package having die structures of different heights and method of forming same

Packaging device and method of making the same

Bump-on-trace structures with high assembly yield

Chip package

Chip package

Semiconductor integrated circuit device

Package structure

Electronic package and fabrication method thereof

Packaging structure, packaging method and template used in packaging method

Method of fabricating a semiconductor device

Methods of forming trenches in packages structures and structures formed thereby

Molded semiconductor package

Hybrid substrates, semiconductor packages including the same and methods for fabricating semiconductor packages

Laminated interposers and packages with embedded trace interconnects

Semiconductor device having recessed edges and method of manufacture

Die package with low electromagnetic interference interconnection

Die packaging with fully or partially fused dielectric leads

Semiconductor device and manufacturing method thereof

REMOVABLE SUBSTRATE FOR CONTROLLING WARPAGE OF AN INTEGRATED CIRCUIT PACKAGE

Integrated circuit package substrate

Circuit boards and semiconductor packages including the same

Heat isolation structures for high bandwidth interconnects

Structures and methods for reliable packages

Semiconductor packages including interposer and methods of manufacturing the same

Low profile integrated circuit (IC) package comprising a plurality of dies

Substrate less die package having wires with dielectric and metal coatings and the method of manufacturing the same

Semiconductor devices with ball strength improvement

Methods of fabricating a semiconductor package

Package substrate and semiconductor package including the same

Methods of manufacturing printed circuit board and semiconductor package

Mixed impedance leads for die packages and method of making the same

Semiconductor package including substrates spaced by at least one electrical connecting element

Cu core ball, solder paste, formed solder, Cu core column, and solder joint

Wiring board with dual stiffeners and dual routing circuitries integrated together and method of making the same

Method of manufacturing wafer level packaging including through encapsulation vias

Semiconductor device that transfers an electric signal with a set of inductors

Reversed build-up substrate for 2.5D

Radio frequency shielding within a semiconductor package

Antenna apparatus and method

Three dimensional structures within mold compound

Semiconductor package for thermal dissipation

Apparatus for stacked semiconductor packages and methods of fabricating the same

Semiconductor package

Semiconductor device manufacturing method, semiconductor device, and wire bonding apparatus

Electronic part embedded substrate and method of producing an electronic part embedded substrate

Semiconductor devices

Microelectronic package having a passive microelectronic device disposed within a package body

Methods of fabricating a semiconductor package structure including at least one redistribution layer

Method of fabricating a chip module with stiffening frame and directional heat spreader

Microelectronic devices, stacked microelectronic devices, and methods for manufacturing such devices

Semiconductor memory device providing analysis and correcting of soft data fail in stacked chips

Electronic component built-in substrate and electronic device

Magnetic shielding for MTJ device or bit

Package-on-package structures and methods for forming the same

Thermally enhanced face-to-face semiconductor assembly with built-in heat spreader and method of making the same

Printed circuit board, method, and semiconductor package

PRINTED CIRCUIT BOARD, PACKAGE SUBSTRATE AND PRODUCTION METHOD FOR SAME

Shielded electronic component package

Printed circuit board, package substrate comprising same, and method for manufacturing same

Semiconductor package and mounting structure thereof

Device, package structure and method of forming the same

Semiconductor device and manufacturing method of semiconductor device

Limiting electronic package warpage with semiconductor chip lid and lid-ring

Semiconductor package assembly with thermal recycling function

Interposers for integrated circuits with multiple-time programming and methods for manufacturing the same

Semiconductor device

Stacked semiconductor die assemblies with support members and associated systems and methods

Package on-package structure including a thermal isolation material and method of forming the same

Semiconductor package assembly and method for forming the same

Semiconductor packaging structure and method

Mechanisms of forming connectors for package on package

Package-on-package semiconductor assemblies and methods of manufacturing the same

Interconnect structure with improved conductive properties and associated systems and methods

Method for fabricating semiconductor package having a multi-layer molded conductive substrate and structure

Semiconductor device including semiconductor chips mounted over both surfaces of substrate

Thin film based fan out and multi die package platform

Flip chip module with enhanced properties

IC interposer with TAP controller and output boundary scan cell

Lead-free solder ball

Electronic component package and method of manufacturing the same

Link emission control

Package structure including a package substrate having an integrated waveguide coupled to first and second integrated circuits, where the package substrate is mounted to an application board

Waveguide including first and second metal plates and having a slotted feed to waveguide transition disposed in the first metallic plate

Semiconductor package and fabrication method thereof

Stacked semiconductor die assemblies with die support members and associated systems and methods

Semiconductor device and method of forming wire studs as vertical interconnect in FO-WLP

Electronic component package and package-on-package structure including the same

Semiconductor package structure and method for manufacturing the same

Semiconductor device

Conductive connections, structures with such connections, and methods of manufacture

Semiconductor wafer including an integrated waveguide for communicating signals between first and second integrated circuit dies

Semiconductor package and manufacturing method of the same

Method of forming a semiconductor package

Molding structure for wafer level package

Semiconductor device with bond pad wiring lead-out arrangement avoiding bond pad probe mark area

Package-on-package (PoP) device comprising bi-directional thermal electric cooler

Selective area heating for 3D chip stack

Methods of forming conductive and insulating layers

SSI PoP

Integrated fan-out structure with guiding trenches in buffer layer

Semiconductor device packages including a controller element

Methods of packaging semiconductor devices and packaged semiconductor devices

Low cost substrates

2.5D microelectronic assembly and method with circuit structure formed on carrier

Package-on-package type semiconductor device which is realized through applying not a TSV technology but a fan-out wafer level package technology

Packaging devices, methods of manufacture thereof, and packaging methods

Semiconductor packages having semiconductor chips disposed in opening in shielding core plate

Semiconductor package with high density die to die connection and method of making the same

Multilayer substrate for semiconductor packaging

Through-hole electrode substrate

Electronic package having circuit structure with plurality of metal layers, and fabrication method thereof

Semiconductor chip package assembly with improved heat dissipation performance

Selective area heating for 3D chip stack

Integration of embedded thin film capacitors in package substrates

Magnetic nanocomposite materials and passive components formed therewith

Magneto-resistive chip package including shielding structure

Semiconductor die assembly and methods of forming thermal paths

Package on package bonding structure and method for forming the same

Semiconductor packages having package-on-package structures

Interconnect structures, packaged semiconductor devices, and methods of packaging semiconductor devices

Reinforced wafer level package comprising a core layer for reducing stress in a solder joint and improving solder joint reliability

Semiconductor device and manufacturing method thereof

Moisture-resistant electronic component, notably microwave, and method for packaging such a component

Wiring substrate

Fan-out wafer level package structure

Through electrode, manufacturing method thereof, and semiconductor device and manufacturing method thereof

Integration of backside heat spreader for thermal management

Integrated circuit comprising at least an integrated antenna

Package for a retinal prosthesis

Package on package (POP) device comprising solder connections between integrated circuit device packages

Semiconductor package manufacturing method

Semiconductor package with improved signal stability and method of manufacturing the same

Systems and methods for conforming test tooling to integrated circuit device with whirlwind cold plate

Dielectric waveguide core between ground planes secured in a channel

Circuit board and circuit board assembly

Systems and methods for clock distribution in a die-to-die interface

Reconstituted wafer-level package dram with conductive interconnects formed in encapsulant at periphery of the package

3D die stacking structure with fine pitches

Flip-chip electronic device with carrier having heat dissipation elements free of solder mask

Semiconductor package with high routing density patch

Laser die backside film removal for integrated circuit (IC) packaging

Methods for packaging integrated circuits

Structure and method to minimize warpage of packaged semiconductor devices

Die package with openings surrounding end-portions of through package vias (TPVs) and package on package (PoP) using the die package

Electronic package assembly

Multi-chip package having a stacked plurality of different sized semiconductor chips, and method of manufacturing the same

Semiconductor device

Semiconductor device and method of forming a package in-fan out package

Semiconductor package

Integrated circuit packaging system with shielding and method of manufacturing thereof

Double-sided semiconductor package and dual-mold method of making same

Reliable microstrip routing for electronics components

Packaged semiconductor devices and methods of packaging semiconductor devices

Chip package and method for fabricating the same

Stacked memory device and system

Integrated circuit structure and method of forming

Semiconductor device and power supply unit utilizing the same

Process for forming package-on-package structures

Semiconductor package assembly with embedded IPD

Chip on package structure and method

System-in-package and fabrication method thereof

Stacked package configurations and methods of making the same

Flexible-substrate-based three-dimensional packaging structure and method

Semiconductor device and method of forming wafer level ground plane and power ring

Package with embedded electronic components and a waveguide cavity through the package cover, antenna apparatus including package, and method of manufacturing the same

Wiring substrate with buried substrate having linear conductors

Circuit assemblies with multiple interposer substrates, and methods of fabrication

Semiconductor device having through-silicon-via and methods of forming the same

Integrated circuit package configurations to reduce stiffness

Semiconductor device with sloped sidewall and related methods

Manufacturing method of package substrate and package manufacturing method of semiconductor device

Pin connector structure and method

Wireless serial links for communications between devices formed in a package

Magnetic shielding of MRAM package

Package on package (PoP) bonding structures

Molded underfilling for package on package devices

Thermal vias disposed in a substrate proximate to a well thereof

3DIC packages with heat dissipation structures

Package-on-package semiconductor device

Electronic device and method for production

Semiconductor substrate structure, semiconductor package and method of manufacturing the same

Embedded structures for package-on-package architecture

Package on package architecture and method for making

Encapsulated dies with enhanced thermal performance

Semiconductor device design methods and conductive bump pattern enhancement methods

Mounting module and antenna apparatus

Method of embedding WLCSP components in e-WLB and e-PLB

Semiconductor package assembly

Microelectronic package having at least two microelectronic elements that are horizontally spaced apart from each other

Semiconductor device and manufacturing method thereof

Integrated circuit package having wirebonded multi-die stack

Semiconductor device and manufacturing method thereof

Semiconductor device and method of forming PoP semiconductor device with RDL over top package

Semiconductor device and manufacturing method thereof

Tunable composite interposer

Integrated circuit assemblies with reinforcement frames, and methods of manufacture

Semiconductor package and mobile device using the same

Semiconductor device

Wiring substrate and method of manufacturing the same

Semiconductor device and method of forming an embedded SoP fan-out package

Electronic package and fabrication method thereof and substrate structure

Wiring substrate and semiconductor device

Non-vertical through-via in package

Semiconductor device and method of forming stacked vias within interconnect structure for FO-WLCSP

Structure for die probing

Semiconductor device and method of forming build-up interconnect structures over carrier for testing at interim stages

Semiconductor device and manufacturing method thereof

Memory module and memory system

Semiconductor device

Fan-out pop stacking process

Interconnect structure with redundant electrical connectors and associated systems and methods

Semiconductor package assembly with passive device

Semiconductor device and method of manufacturing the same

Methods to form high density through-mold interconnections

Semiconductor packages and methods of fabricating the same

Semiconductor device

Semiconductor packaging structure and manufacturing method thereof

Circuit substrate and method for manufacturing the same

Stub minimization for assemblies without wirebonds to package substrate

Semiconductor device including conductive via with buffer layer at tapered portion of conductive via

Semiconductor device and electronic device

Package structures and methods for forming the same

Switchable package capacitor for charge conservation and series resistance

Semiconductor manufacturing apparatus and method of manufacturing semiconductor device

Pressing of wire bond wire tips to provide bent-over tips

Multi-layered circuit board and semiconductor device

Package for image sensor with outer and inner frames

Fan out system in package and method for forming the same

Semiconductor package assembly

Scalable package architecture and associated techniques and configurations

Package-on-package stacked microelectronic structures

Embedded circuit package

Interfacial alloy layer for improving electromigration (EM) resistance in solder joints

Method for package-on-package assembly with wire bonds to encapsulation surface

Semiconductor device and method of self-confinement of conductive bump material during reflow without solder mask

Electronic package and fabrication method thereof

Semiconductor package, electronic device, and solder mounting method

Packaged integrated circuit including a switch-mode regulator and method of forming the same

3D semiconductor package interposer with die cavity

Interconnect structures, packaged semiconductor devices, and methods of packaging semiconductor devices

Inductor for semiconductor integrated circuit