212622 ⎘
Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by; Details of package parts other than the semiconductor or other solid state devices to be connected; Die mounting substrate; Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
#302SEMICONDUCTOR PACKAGE INCLUDING A TEST BUMP
#303Integrated circuit package and method of forming same
#304METHODS OF FORMING SEMICONDUCTOR PACKAGES
#305SEMICONDUCTOR DEVICE WITH INTEGRATED HEAT DISTRIBUTION AND MANUFACTURING METHOD THEREOF
#306SUBSTRATES WITH DOWNSET
#307SEMICONDUCTOR DEVICE
#308Structure and Method of Forming a Joint Assembly
#309Apparatuses including ball grid arrays and associated systems
#310ELECTRONIC PACKAGE, PACKAGE SUBSTRATE AND MANUFACTURING METHOD THEREOF
#311STACKED SEMICONDUCTOR DIE ASSEMBLIES WITH DIE SUPPORT MEMBERS AND ASSOCIATED SYSTEMS AND METHODS
#312CHIP PACKAGING METHOD AND CHIP PACKAGE BASED ON PANEL FORM
#313PACKAGE STRUCTURE
#314Semiconductor package with EMI shield and fabricating method thereof
#315COMMON MODE SUPPRESSION CIRCUIT
#316SEMICONDUCTOR PACKAGE STRUCTURE, METHOD OF FORMING THE SAME AND SEMICONDUCTOR PACKAGE ASSEMBLY HAVING THE SAME
#317PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME
#318SEMICONDUCTOR PACKAGE WITH HIGH ROUTING DENSITY PATCH
#319SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
#320Fan-out package having a main die and a dummy die
#321INTERPOSER, METHOD OF DESIGNING INTERPOSER, AND METHOD OF MANUFACTURING INTERPOSER
#322SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
#323Direct-Bonded Native Interconnects And Active Base Die
#3243D INTEGRATED CIRCUIT (3DIC) STRUCTURES AND METHODS FOR MANUFACTURING THE SAME
#325MEMORIES AND MEMORY COMPONENTS WITH INTERCONNECTED AND REDUNDANT DATA INTERFACES
#326FACILITATOR DIES FOR HETEROGENEOUS DIE STACKS
#327METHODS RELATED TO DUAL-SIDED MODULE WITH LAND-GRID ARRAY (LGA) FOOTPRINT
#328PACKAGE ASSEMBLY WITH THERMAL INTERFACE MATERIAL GUTTER
#329BUFFER CHIP, AND SEMICONDUCTOR PACKAGE INCLUDING THE BUFFER CHIP AND A MEMORY CHIP
#330RF BRIDGE
#331FLIP CHIP BALL GRID ARRAY PACKAGE
#332PACKAGE CARRIER AND MANUFACTURING METHOD THEREOF AND CHIP PACKAGE STRUCTURE
#333Structure and Method for Fabricating a Computing System with an Integrated Voltage Regulator Module
#334Stacked IC structure with orthogonal interconnect layers
#335CHIP PACKAGE WITH CORE EMBEDDED CHIPLET
#336SEMICONDUCTOR PACKAGES AND METHODS OF FORMING SAME
#337SEMICONDUCTOR PACKAGE
#3383D SEMICONDUCTOR DEVICES AND STRUCTURES WITH METAL LAYERS
#339LTHC AS CHARGING BARRIER IN INFO PACKAGE FORMATION
#340OFFSET INTERPOSERS FOR LARGE-BOTTOM PACKAGES AND LARGE-DIE PACKAGE-ON- PACKAGE STRUCTURES
#341METHOD OF MAKING SEMICONDUCTOR DEVICE HAVING REDUCED BUMP HEIGHT VARIATION
#342METHODS AND APPARATUS TO PREVENT OVER-ETCH IN SEMICONDUCTOR PACKAGES
#343INTERCONNECT SUBSTRATE, METHOD OF MAKING THE SAME, AND SEMICONDUCTOR APPARATUS
#3443DIC PACKAGING WITH HOT SPOT THERMAL MANAGEMENT FEATURES
#345DIRECT ELECTROPLATING ON MODIFIED POLYMER-GRAPHENE COMPOSITES
#346PACKAGE STACKING USING CHIP TO WAFER BONDING
#347HIGH FREQUENCY DEVICE PACKAGES
#348SEMICONDUCTOR PACKAGES HAVING CAPACITORS
#3493D semiconductor device and structure with bonding and DRAM memory cells
#350STRUCTURE AND FORMATION METHOD OF PACKAGE WITH INTEGRATED CHIPS
#351DSA (DIRECTED SELF-ASSEMBLY) BASED SPACER AND LINER FOR SHORTING MARGIN OF VIA
#352PACKAGE-ON-PACKAGE ASSEMBLY WITH WIRE BONDS TO ENCAPSULATION SURFACE
#353Semiconductor substrate structure, semiconductor structure and manufacturing method thereof
#354METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE HAVING BONDING ELEMENT
#355SEMICONDUCTOR STRUCTURE HAVING BONDING ELEMENT
#356INTERPOSER WITH INTEGRATIVE PASSIVE COMPONENTS
#357SEMICONDUCTOR DEVICE
#358PACKAGE BUMPS OF A PACKAGE SUBSTRATE
#359SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES
#360SEMICONDUCTOR DEVICES INCLUDING SEED STRUCTURE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICES
#361INTEGRATED SHIELD PACKAGE AND METHOD
#362SEMICONDUCTOR PACKAGE AND METHOD
#363SEMICONDUCTOR PACKAGE INCLUDING SEMICONDUCTOR CHIP HAVING THROUGH-ELECTRODE
#364MEMORY DEVICE AND METHOD OF ASSEMBLING SAME
#365BACKSIDE POWER DELIVERY NETWORK
#366INTEGRATED CHIP INCLUDING A CAPACITOR ARRAY
#367INTEGRATED TOP SIDE POWER DELIVERY THERMAL TECHNOLOGY
#368SEMICONDUCTOR PACKAGES WITH PASS-THROUGH CLOCK TRACES AND ASSOCIATED SYSTEMS AND METHODS
#369SEMICONDUCTOR DEVICE
#370SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME
#371CHIP PACKAGE STRUCTURE AND PACKAGING METHOD THEREOF, AND ELECTRONIC DEVICE
#372INTEGRATED CIRCUIT PACKAGES INCLUDING SUBSTRATES WITH STRENGTHENED GLASS CORES
#373PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF
#374SEMICONDUCTOR PACKAGE
#375SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME
#376PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
#377PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
#378Methods for producing a 3D semiconductor device and structure with memory cells and multiple metal layers
#379PACKAGING SUBSTRATE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME
#3803D semiconductor memory device and structure with memory and metal layers
#381THERMAL INTERFACE MATERIAL HAVING DIFFERENT THICKNESSES IN PACKAGES
#382Wire bonding method and apparatus for electromagnetic interference shielding
#383Memory system having combined high density, low bandwidth and low density, high bandwidth memories
#384Devices and methods related to radio-frequency filters on silicon-on-insulator substrate
#385Method of Forming Packages of Stacked Chips
#386ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF
#387SEMICONDUCTOR PACKAGE
#388Integrated Fan-Out Packages with Embedded Heat Dissipation Structure
#389METHOD FOR FABRICATING A CHIP PACKAGE
#390Semiconductor package having a high reliability
#391NAND DIE WITH WIRE-BOND INDUCTIVE COMPENSATION FOR ALTERED BOND WIRE BANDWIDTH IN MEMORY DEVICES
#392SEMICONDUCTOR DEVICE
#393FAN-OUT PACKAGE HAVING BALL GRID ARRAY SUBSTRATE WITH SIGNAL AND POWER METALLIZATION
#394SEMICONDUCTOR DEVICE WITH THROUGH-MOLD VIA
#395SEMICONDUCTOR COMPONENTS HAVING CONDUCTIVE VIAS WITH ALIGNED BACK SIDE CONDUCTORS
#396Methods for producing a 3D semiconductor device and structure with memory cells and multiple metal layers
#397Electronic device having a substrate-to-substrate interconnection structure and manufacturing method thereof
#398SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
#399STACKED SEMICONDUCTOR DIE ASSEMBLIES WITH SUPPORT MEMBERS AND ASSOCIATED SYSTEMS AND METHODS
#400PACKAGE SUBSTRATE WITH DUAL DAMASCENE BASED SELF-ALIGNED VIAS
#401SEMICONDUCTOR PACKAGE
#402METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE, AND SEMICONDUCTOR PACKAGE
#403MULTI-CHIP PACKAGING METHOD AND MULTI-CHIP PACKAGING STRUCTURE
#4043D semiconductor devices and structures with metal layers
#405Chip package with lid
#406Chip package
#407Stiffener package and method of fabricating stiffener package
#408Semiconductor Device with Discrete Blocks
#4093D semiconductor device and structure with single-crystal layers
#410Stacked semiconductor device assembly in computer system
#411Fan-Out Stacked Package and Methods of Making the Same
#412Memory device comprising programmable command-and-address and/or data interfaces
#413INTERPOSER CIRCUIT
#414Semiconductor structure and manufacturing method thereof
#415PACKAGES WITH METAL LINE CRACK PREVENTION DESIGN
#416SEMICONDUCTOR DEVICE HAVING EMI SHIELDING STRUCTURE AND RELATED METHODS
#417SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
#418SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
#419Integrated Circuit Packages and Methods of Forming the Same
#420SYSTEM AND METHOD FOR LASER ASSISTED BONDING OF AN ELECTRONIC DEVICE
#421LOGIC DRIVE BASED ON STANDARD COMMODITY FPGA IC CHIPS USING NON-VOLATILE MEMORY CELLS
#422Semiconductor device with hollow interconnectors
#423Package-on-package assembly with wire bond vias
#424NON-VOLATILE FIELD PROGRAMMABLE MULTICHIP PACKAGE
#425SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
#4263D semiconductor device and structure with bonding
#427Window ball grid array (WBGA) package and method for manufacturing the same
#428WINDOW BALL GRID ARRAY (WBGA) PACKAGE AND METHOD FOR MANUFACTURING THE SAME
#429BALL GRID ARRAY AND CONFIGURATION METHOD OF THE SAME
#430INTEGRATED FAN-OUT PACKAGE AND METHOD OF MAKING SAME
#4313D PACKAGING WITH SILICON DIE AS THERMAL SINK FOR HIGH-POWER LOW THERMAL CONDUCTIVITY DIES
#432FAN-OUT PACKAGE STRUCTURES WITH CASCADED OPENINGS IN ENHANCEMENT LAYER
#433ELECTRONIC DEVICES
#434SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF
#435METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
#436INTEGRATING AND ACCESSING PASSIVE COMPONENTS IN WAFER-LEVEL PACKAGES
#437Ball grid array package design
#438BGA STIM PACKAGE ARCHITECTURE FOR HIGH PERFORMANCE SYSTEMS
#439Semiconductor Device and Method of Forming Underfill Dam for Chip-to-Wafer Device
#440BONDING PAD STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
#441BONDING PAD STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
#442EXTENDING MULTICHIP PACKAGE LINK OFF PACKAGE
#443SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SAME
#444INTERFACE FOR A SEMICONDUCTOR CHIP WITH ADAPTIVE VIA REGION ARRANGEMENT AND SEMICONDUCTOR DEVICE WITH STACKED SEMICONDUCTOR CHIPS
#445METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE WITH FIXING FEATURE ON WHICH BONDING WIRE IS DISPOSED
#446SEMICONDUCTOR PACKAGE
#447Bridge interconnection with layered interconnect structures
#448Offset interposers for large-bottom packages and large-die package-on-package structures
#449Chip package structure having molding layer
#450Cooling Cover and Packaged Semiconductor Device Including the Same
#451Integrated Electronic Component
#452Methods for producing a 3D semiconductor device and structure with memory cells and multiple metal layers
#453CONFIGURABLE, POWER SUPPLY VOLTAGE REFERENCED SINGLE-ENDED SIGNALING WITH ESD PROTECTION
#454ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF
#455Semiconductor package with EMI shield and fabricating method thereof
#456SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME
#457Memory System Topologies Including A Memory Die Stack
#458HEAT DISSIPATION STRUCTURES FOR INTEGRATED CIRCUIT PACKAGES AND METHODS OF FORMING THE SAME
#459Semiconductor device packages, packaging methods, and packaged semiconductor devices
#460METHODS OF MANUFACTURING STACKED SEMICONDUCTOR DIE ASSEMBLIES WITH HIGH EFFICIENCY THERMAL PATHS
#461Memory bandwidth aggregation using simultaneous access of stacked semiconductor memory die
#462Semiconductor package
#4633D semiconductor device and structure with bonding
#464Package-on-Package Structure Including a Thermal Isolation Material
#465PACKAGE WITH FAN-OUT STRUCTURES
#466Method of forming semiconductor packages having through package vias
#467Package assembly lid and methods for forming the same
#468Dummy through vias for Integrated Circuit Packages and Methods of Forming the Same
#469METHOD OF MANUFACTURING A SEMICONDUCTOR CHIP INCLUDING A STRESS CONCENTRATION PORTION
#470PACKAGE COMPRISING AN INTERCONNECTION DIE LOCATED BETWEEN SUBSTRATES
#471Low cost package warpage solution
#472Low warpage high density trench capacitor
#473METHOD FOR MANUFACTURING WINDOW BALL GRID ARRAY (WBGA) PACKAGE
#474WINDOW BALL GRID ARRAY (WBGA) PACKAGE
#475Multi-die memory device
#476Fault tolerant memory systems and components with interconnected and redundant data interfaces
#477POP STRUCTURE OF THREE-DIMENSIONAL FAN-OUT MEMORY AND PACKAGING METHOD THEREOF
#478PACKAGING STRUCTURE AND PACKAGING METHOD
#479Triple-Sided Module
#4803D semiconductor device and structure with single-crystal layers
#481SEMICONDUCTOR DEVICE AND METHOD
#482Fingerprint Sensor Device and Method
#483PACKAGE STRUCTURE WITH DUMMY DIE
#484Semiconductor packages and methods of forming the same
#485SEMICONDUCTOR PACKAGES
#486Structure and method for fabricating a computing system with an integrated voltage regulator module
#487Memory circuit and cache circuit configuration
#488FLIP CHIP PACKAGE FOR SEMICONDUCTOR DEVICES
#489COOLING PACKAGE STRUCTURE APPLIED TO INTEGRATED CIRCUIT AND METHOD OF ASSEMBLY THEREOF
#490SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
#491Methods for producing a 3D semiconductor device and structure with memory cells and multiple metal layers
#492Semiconductor device
#493GAS SENSOR
#494PACKAGING ARCHITECTURE WITH THERMALLY CONDUCTIVE INTEGRATED CIRCUIT BRIDGE
#495MICROELECTRONIC ASSEMBLIES INCLUDING STIFFENERS
#496MICROELECTRONIC ASSEMBLIES INCLUDING STIFFENERS
#497MICROELECTRONIC ASSEMBLIES INCLUDING STIFFENERS
#498BALL GRID ARRAY SOLDER PAD TRIMMING
#499HIGH-BANDWIDTH PACKAGE-ON-PACKAGE STRUCTURE
#500Method for interconnecting stacked semiconductor devices
#501STACKED DIE PACKAGING ARCHITECTURE WITH CONDUCTIVE VIAS ON INTERPOSER
#502FAN-OUT WATER-LEVEL PACKAGING STRUCTURE AND MANUFACTURING METHOD THEREOF
#503Game engine on a chip
#504Shielded electronic component package
#505Apparatuses including ball grid arrays and associated systems and methods
#506Semiconductor Device and Method of Forming Conductive Vias to Have Enhanced Contact to Shielding Layer
#507TESTING INTERPOSER METHOD AND APPARATUS
#508Power converter package with thermally enhanced interposers to cooling fins
#509Package and method of forming same
#510Chip package and manufacturing method thereof
#511Chip package with redistribution structure having multiple chips
#512Thermally enhanced FCBGA package
#513Semiconductor package and method
#514Multi-pitch ball grid array
#515Wafer level chip scale packaging intermediate structure apparatus and method
#516Fan-out structure and method of fabricating the same
#517Stack package and methods of manufacturing the same
#518Integrating and accessing passive components in wafer-level packages
#519DOUBLE-SIDED REDISTRIBUTION LAYER (RDL) SUBSTRATE FOR PASSIVE AND DEVICE INTEGRATION
#520Methods and heat distribution devices for thermal management of chip assemblies
#521SOLDER PADS WITH CONCAVE EDGES FOR BALL GRID ARRAYS
#522SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
#523High density interconnection using fanout interposer chiplet
#524PACKAGE BASE SUBSTRATE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME
#525SEMICONDUCTOR PACKAGE HAVING TWO-DIMENSIONAL INPUT AND OUTPUT DEVICE
#526Method for fabricating semiconductor device with stacking structure
#527Semiconductor package having a high reliability
#528Semiconductor package for thermal dissipation
#529Semiconductor device with stacking structure
#530Semiconductor device with composite bottom interconnectors
#531Semiconductor device with hollow interconnectors
#532Pad Design For Reliability Enhancement in Packages
#533SEMICONDUCTOR DEVICE WITH REDISTRIBUTION LAYERS FORMED UTILIZING DUMMY SUBSTRATES
#534ULTRA LOW LOSS AND HIGH-DENSITY ROUTING BETWEEN CORES
#535ULTRA LOW LOSS ROUTING BETWEEN GLASS CORES
#536Interposer circuit
#537Semiconductor packages with chiplets coupled to a memory device
#538INORGANIC FILL MATERIAL FOR STACKED DIE ASSEMBLY
#539DUMMY DIE PLACEMENT WITHIN A DICING STREET OF A WAFER
#540Semiconductor packages
#541Package-on-package type semiconductor package
#542Semiconductor package having a through intervia through the molding compound and fan-out redistribution layers disposed over the respective die of the stacked fan-out system-in-package
#543Method for producing a 3D semiconductor device and structure with memory cells and multiple metal layers
#544Semiconductor device
#545Failover methods and systems in three-dimensional memory device
#5463D semiconductor device and structure with bonding
#547SEMICONDUCTOR PACKAGE
#548Process control for package formation
#549Multi-chip package with high density interconnects
#550PACKAGE-LEVEL ESD PROTECTION
#5513D chip with shared clock distribution network
#552Face-to-face through-silicon via multi-chip semiconductor apparatus with redistribution layer packaging and methods of assembling same
#5533D semiconductor device and structure with single-crystal layers
#554Package-on-package (PoP) semiconductor package and electronic system including the same
#555SEMICONDUCTOR COMPRISING REDISTRIBUTION STRUCTURE, AND METHOD FOR MANUFACTURING THE SAME
#556VERTICAL INTERCONNECT DESIGN FOR IMPROVED ELECTRICAL PERFORMANCE
#557Contact pad for semiconductor device
#558Package structure and method of fabricating the same
#559Packaged semiconductor devices and methods of packaging semiconductor devices
#560HIGH-DENSITY MICROBUMP ARRAYS WITH ENHANCED ADHESION AND METHODS OF FORMING THE SAME
#561Fan-out wafer level package structure
#562Semiconductor Package
#563SEMICONDUCTOR PACKAGES HAVING ADHESIVE MEMBERS
#564Method for manufacturing package structure
#565Semiconductor Device and Method of Forming Dual-Sided Interconnect Structures in FO-WLCSP
#566Methods of forming semiconductor packages
#567SEMICONDUCTOR PACKAGE
#568Semiconductor package having routable encapsulated conductive substrate and method
#569Package structure and method for manufacturing the same
#570Flexible memory system with a controller and a stack of memory
#571Semiconductor packages
#572Semiconductor package
#573Semiconductor device with transmissive layer and manufacturing method thereof
#574EXTENDING MULTICHIP PACKAGE LINK OFF PACKAGE
#575Chip package
#576STACKED TRANSISTOR ARRANGEMENT AND PROCESS OF MANUFACTURE THEREOF
#577SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
#578LIDDED SEMICONDUCTOR PACKAGE
#579Semiconductor packages with pass-through clock traces and associated systems and methods
#580Semiconductor device package and manufacturing method thereof
#581Integrated circuit packages, antenna modules, and communication devices
#582Semiconductor device package
#583Package device
#584SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME
#585SEMICONDUCTOR DIE DIPPING STRUCTURE
#586Integrated circuit package having wirebonded multi-die stack
#587Dicing Process in Packages Comprising Organic Interposers
#588Method to enable 30 microns pitch EMIB or below
#589SEMICONDUCTOR DEVICE ASSEMBLY WITH THROUGH-PACKAGE INTERCONNECT AND ASSOCIATED SYSTEMS, DEVICES, AND METHODS
#5903D semiconductor memory device and structure
#591PACKAGE ASSEMBLY INCLUDING A PACKAGE LID HAVING AN INNER FOOT AND METHODS OF MAKING THE SAME
#592Package assembly including lid with additional stress mitigating feet and methods of making the same
#593SEMICONDUCTOR PACKAGE
#594STACKED MICROFEATURE DEVICES AND ASSOCIATED METHODS
#595Fine pitch BVA using reconstituted wafer with area array accessible for testing
#596Signal delivery in stacked device
#597WAFER-LEVEL ASIC 3D INTEGRATED SUBSTRATE, PACKAGING DEVICE AND PREPARATION METHOD
#598WAFER-LEVEL ASIC 3D INTEGRATED SUBSTRATE, PACKAGING DEVICE AND PREPARATION METHOD
#599Thermally enhanced FCBGA package
#600Memory system having combined high density, low bandwidth and low density, high bandwidth memories