212848 ⎘
Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by; Technical effects Effects and problems related to the device integration
Sub-classes:Panel-Level Chip Packaging Structure and Method Based on Steel Plate Platform
#2NON-CONDUCTIVE FILM, SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
#3SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
#4POWER SEMICONDUCTOR DEVICE HAVING A SOLDER BLEED OUT PREVENTION LAYER AND METHOD FOR FABRICATING THE SAME
#5PACKAGING STRUCTURE AND PACKAGING METHOD
#6METHOD OF MANUFACTURING LAMINATED ASSEMBLY
#7Packaging Structure for Large-Size Chips Adapted to Small-Size Packages and Processing Method Thereof
#8SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
#9GANG CLIP WITH MOUNT COMPOUND ARRESTER
#10METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
#11Semiconductor device having a solder blocking metal layer
#12Decoupling capacitor mounted on an integrated circuit die, and method of manufacturing the same
#13SEMICONDUCTOR DEVICE HAVING REDISTRIBUTION LAYER WITH COPPER MIGRATION STOPPING
#14RECONFIGURED WIDE I/O MEMORY MODULES AND PACKAGE ARCHITECTURES USING SAME
#15Floating bond pad for power semiconductor devices
#16Fixture design for pre-attachment package on package component assembly