ClassID:

212854

H01L2924/3862 - CPC Classification

Classification description:

Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by; Technical effects; Effects and problems related to the device integration; Wire effects Sweep

Recent Application in this class:
#1
20250357413
2025-11-20

SEMICONDUCTOR PACKAGE

#2
20250015038
2025-01-09

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES AND CORRESPONDING SEMICONDUCTOR DEVICE

#3
20250006720
2025-01-02

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE

#4
20240113155
2024-04-04

WIRE BONDS FOR GALVANIC ISOLATION DEVICE

#5
20240047336
2024-02-08

ELECTRONIC PACKAGE

#6
20230411170
2023-12-21

INTEGRATED CIRCUIT HAVING A ROUTABLE LEADFRAME

#7
20230101826
2023-03-30

Semiconductor device package having multi-layer molding compound and method

#8
20190088565
2019-03-21

Face down dual sided chip scale memory package

#9
20190051583
2019-02-14

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

#10
20180204788
2018-07-19

Semiconductor device and method for manufacturing the same

#11
20170309551
2017-10-26

Semiconductor device including a first internal circuit, a second internal circuit and a switch circuit unit

#12
20170125327
2017-05-04

Semiconductor package with coated bonding wires and fabrication method thereof

#13
20170016950
2017-01-19

Screening methodology to eliminate wire sweep in bond and assembly module packaging

#14
20160372441
2016-12-22

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE

#15
20160307866
2016-10-20

Plastic-packaged semiconductor device having wires with polymerized insulating layer

#16
20160181225
2016-06-23

Corrosion-resistant copper bonds to aluminum

#17
20160133580
2016-05-12

Scribe seals and methods of making

#18
20150037938
2015-02-05

Packaging a semiconductor device having wires with polymerized insulator skin

#19
20140266242
2014-09-18

Screening methodology to eliminate wire sweep in bond and assembly module packaging

#20
20140183751
2014-07-03

Three-dimensional structure in which wiring is provided on its surface

#21
20140182887
2014-07-03

Three-dimensional structure for wiring formation

#22
20140091479
2014-04-03

Semiconductor device with stacked semiconductor chips

#23
20130175709
2013-07-11

Integrated circuit package and method of assembling an integrated circuit package

#24
20130140686
2013-06-06

Semiconductor package structure and manufacturing method thereof

#25
20130037941
2013-02-14

Semiconductor device reducing risks of a wire short-circuit and a wire flow

#26
20130001790
2013-01-03

System on a chip with interleaved sets of pads

#27
20120018859
2012-01-26

Semiconductor device and method of manufacturing the same

#28
20110260337
2011-10-27

Semiconductor device with stacked semiconductor chips

#29
20090045525
2009-02-19

Semiconductor element and semiconductor device

#30
20090032972
2009-02-05

SEMICONDUCTOR DEVICE

#31
20080296780
2008-12-04

MEMORY DEVICES INCLUDING SEPARATING INSULATING STRUCTURES ON WIRES AND METHODS OF FORMING

#32
20070096342
2007-05-03

METHOD FOR REDUCING OR ELIMINATING SEMICONDUCTOR DEVICE WIRE SWEEP IN A MULTI-TIER BONDING DEVICE AND A DEVICE PRODUCED BY THE METHOD

#33
20070063354
2007-03-22

Wire sweep resistant semiconductor package and manufacturing method therefor

#34
20060043612
2006-03-02

Wire sweep resistant semiconductor package and manufacturing method thereof

#35
20050224930
2005-10-13

System for reducing or eliminating semiconductor device wire sweep

#36
20050200006
2005-09-15

Semiconductor package without bonding wires and fabrication method thereof

#37
20050121798
2005-06-09

Method for reducing or eliminating semiconductor device wire sweep in a multi-tier bonding device and a device produced by the method

#38
20050085019
2005-04-21

System and method for reducing or eliminating semiconductor device wire sweep