221925 ⎘
Logic circuits, i.e. having at least two inputs acting on one output ; Inverting circuits using specified components using semiconductor devices using field-effect transistors; Synchronous circuits, i.e. using clock signals Self-timed logic
Reduced-power dynamic data circuits with wide-band energy recovery
#2Fault resilient flip-flop with balanced topology and negative feedback
#3Reduced-power dynamic data circuits with wide-band energy recovery
#4Apparatuses and methods for transmitting an operation mode with a clock
#5Self-clocking sampler with reduced metastability
#6Computer product for making a semiconductor device
#7COMPOSITIONS AND METHODS FOR PREPARING OLIGONUCLEOTIDE SOLUTIONS
#8Synchronizing a self-timed processor with an external event
#9Reduced-power dynamic data circuits with wide-band energy recovery
#10Self-clocking sampler with reduced metastability
#11COMPOSITIONS AND METHODS FOR PREPARING OLIGONUCLEOTIDE SOLUTIONS
#12Logic circuit, semiconductor device, electronic component, and electronic device
#13Network logic synthesis
#14Compositions and methods for preparing oligonucleotide solutions
#15Asynchronous data link
#16Timing violation resilient asynchronous template
#17Logic circuit and system and computer program product for logic synthesis
#18Integrated clock gater (ICG) using clock cascode complimentary switch logic
#19Timing violation resilient asynchronous template
#20Integrated clock gater (ICG) using clock cascode complimentary switch logic
#21Compositions and methods for preparing oligonucleotide solutions
#22Clock-delayed domino logic circuit and devices including the same
#23Inactivity triggered self clocking logic family
#24Semiconductor device, a parallel interface system and methods thereof
#25Domino logic circuits and pipelined domino logic circuits
#26One phase logic
#27One phase logic
#28Semiconductor device, a parallel interface system and methods thereof
#29Self-timed RS-trigger with the enhanced noise immunity
#30Self-timed trigger circuit with single-rail data input
#31Compositions and methods for preparing oligonucleotide solutions
#32Semiconductor device, a parallel interface system and methods thereof
#33Domino logic circuit techniques for suppressing subthreshold and gate oxide leakage
#34Low swing domino logic circuits
#35Dynamic circuit
#36Dynamic logic circuit apparatus and method for reducing leakage power consumption via separate clock and output stage control
#37Micropipeline stage controller and control scheme
#38Method and apparatus for an asynchronous pulse logic circuit
#39Apparatuses and methods for transmitting an operation mode with a clock
#40Self-gating pulsed flip-flop
#41Integrated clock gating cell using a low area and a low power latch