Y10S438/924 - CPC Classification Index

ClassID:

242013 ⎘

Y10S438/924 - CPC Classification

Classification description:

Semiconductor device manufacturing: process; Doping To facilitate selective etching

Recent Application in this class:

20180182636

2018-06-28

Etch rate modulation through ion implantation

20170362082

2017-12-21

Microstructure processing method and microstructure processing apparatus

20170263466

2017-09-14

Bottom processing

20170178914

2017-06-22

Etch rate modulation through ion implantation

20170053810

2017-02-23

Atomic layer etching of tungsten and other metals

20140139762

2014-05-22

Semiconductor device and method of fabricating the same

20120184104

2012-07-19

METHOD FOR FABRICATING FINE PATTERN IN SEMICONDUCTOR DEVICE

20120120336

2012-05-17

Semiconductor device and method of fabricating the same

20110076851

2011-03-31

Method for fabricating fine pattern in semiconductor device

#10

20110003443

2011-01-06

Method for producing a transistor with metallic source and drain

#11

20100148183

2010-06-17

Method of forming a carbon nanotube-based contact to semiconductor

#12

20100036514

2010-02-11

Creating multi-layer/multi-input/multi-output (MLMIMO) models for metal-gate structures

#13

20090322698

2009-12-31

Semiconductor device and method of fabricating the same

#14

20090173964

2009-07-09

Method of forming a carbon nanotube-based contact to semiconductor

#15

20090087968

2009-04-02

Method for fabricating fine pattern in semiconductor device

#16

20090040445

2009-02-12

Semiconductor device and method of fabricating the same

#17

20090010291

2009-01-08

Light-emitting device with a protection layer to prevent the inter-diffusion of zinc (Zn) atoms

#18

20080286954

2008-11-20

Method of forming pattern of semiconductor device

#19

20080237641

2008-10-02

Surrounded-Channel Transistors with Directionally Etched Gate or Insulator Formation Regions

#20

20080166827

2008-07-10

Thin film transistor array panel and method for manufacturing the same

#21

20080073674

2008-03-27

Thin film transistor array panel and method for manufacturing the same

#22

20080070409

2008-03-20

Method of fabricating interconnections of microelectronic device using dual damascene process

#23

20070197042

2007-08-23

Method of varying etch selectivities of a film

#24

20070148860

2007-06-28

Method for selective epitaxial growth of source/drain areas

#25

20070148801

2007-06-28

Semiconductor device and method for manufacturing the same

#26

20070137989

2007-06-21

Optical components and production thereof

#27

20060186422

2006-08-24

Etching a nitride-based heterostructure

#28

20060157443

2006-07-20

Pattern reversal process for self aligned imprint lithography and device

#29

20060151791

2006-07-13

Semiconductor device and method of fabricating the same

#30

20060050192

2006-03-09

Thin film transistor array panel and method for manufacturing the same

#31

20050224889

2005-10-13

Methods of fabricating surrounded-channel transistors with directionally etched gate or insulator formation regions

#32

20050148189

2005-07-07

Method of manufacturing a layer sequence and a method of manufacturing an integrated circuit

#33

20050148131

2005-07-07

Method of varying etch selectivities of a film

#34

20050106890

2005-05-19

Method for forming a trench in a layer or a layer stack on a semiconductor wafer