Inventor profile of:

Werner Graf

City:

Dresden

Country:

Germany

Published Applications:

15

Last publication date:

2015-03-05

Top Assignees for applications by Werner Graf

The entities that hold a legal rights for patent applications filed by inventor Graf Werner:

Recent patent applications by Graf Werner

Werner Graf from Dresden, DE has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2015-03-05
US20150064872A1
Electricity

Top corner rounding by implant-enhanced wet etching

#2 | 2010-04-15
US20100090285A1
Electricity

Integrated circuit with a contact structure including a portion arranged in a cavity of a semiconductor structure

#3 | 2010-04-15
US20100090264A1
Electricity

Interconnect structure for semiconductor devices

#4 | 2009-12-10
US20090302380A1
Electricity

Word line to bit line spacing method and apparatus

#5 | 2008-12-25
US20080315326A1
Electricity

Method for forming an integrated circuit having an active semiconductor device and integrated circuit

#6 | 2008-06-26
US20080150141A1
Electricity

Manufacturing method for an integrated semiconductor structure and corresponding semiconductor structure

#7 | 2007-09-27
US20070224810A1
Electricity

Manufacturing method for an integrated semiconductor structure

#8 | 2007-05-15
US10485308
-

Method for fabricating a semiconductor product with a memory area and a logic area

#9 | 2006-12-07
US20060276019A1
Electricity

Method for production of contacts on a wafer

#10 | 2006-08-22
US10739477
-

Method for production of contacts on a wafer

#11 | 2006-08-03
US20060172539A1
Electricity

Method of treating a structured surface

#12 | 2006-07-06
US20060148227A1
Electricity

Method for fabricating a first contact hole plane in a memory module

#13 | 2006-06-29
US20060141756A1
Electricity

Method for producing a semiconductor structure

#14 | 2005-08-09
US10431425
-

Method for fabricating a transistor with a gate structure

#15 | 2005-01-06
US20050003308A1
Electricity

Method for fabricating a contact hole plane in a memory module

InventorID:

1087869 ⎘