Toronto
Canada
31
2026-04-02
The entities that hold a legal rights for patent applications filed by inventor Ng Philip:
Philip Ng from Toronto, CA has applied for patents for these inventions. The list has both pending applications and granted patents:
MULTI-HOST REMOTE MEMORY ACCESS
#2 | 2024-08-29ADDRESS-SPACE-IDENTIFIER-BASED SECURITY OF DATA TRANSFER REQUESTS
#3 | 2024-08-29SECURE MANAGEMENT OF DEVICE CONTROL INFORMATION IN CONFIDENTIAL COMPUTING ENVIRONMENTS
#4 | 2024-07-04SECURE DIRECT MEMORY ACCESS
#5 | 2024-07-04SEGMENTED NON-CONTIGUOUS REVERSE MAP TABLE
#6 | 2024-07-04INTERRUPT CONTROL USING A GUEST OWNED BACKING PAGE
#7 | 2024-07-04SECURE MEMORY-MAPPED INPUT/OUTPUT
#8 | 2024-06-27Interrupt cache configuration
#9 | 2024-06-20Accessing Multiple Physical Partitions of a Hardware Device
#10 | 2023-11-23Address Translation Services Buffer
#11 | 2023-08-03Arbitration allocating requests during backpressure
#12 | 2022-10-06System and method for providing page migration
#13 | 2022-09-29Performing Memory Accesses for Input-Output Devices using Encryption Keys Associated with Owners of Pages of Memory
#14 | 2022-09-29Handling the migration of pages of memory accessible by input-output devices
#15 | 2022-08-25Providing copies of input-output memory management unit registers to guest operating systems
#16 | 2022-06-30Address translation services buffer
#17 | 2022-06-30Method, system, and apparatus for supporting multiple address spaces to facilitate data movement
#18 | 2022-06-30Migrating pages of memory accessible by input-output devices
#19 | 2021-03-25Providing interrupts from an input-output memory management unit to guest operating systems
#20 | 2020-12-10Guest operating system buffer and log accesses by an input-output memory management unit
#21 | 2020-12-03Providing copies of input-output memory management unit registers to guest operating systems
#22 | 2020-10-22Domain identifier and device identifier translation by an input-output memory management unit
#23 | 2020-07-16Light-weight memory expansion in a coherent memory system
#24 | 2020-06-18MEMORY REQUEST CHAINING ON BUS
#25 | 2020-06-04Memory initialization reporting and control
#26 | 2019-08-29Aligning active and idle phases in a mixed workload computing platform
#27 | 2018-08-16Controlling access by IO devices to pages in a memory in a computing device
#28 | 2015-04-30Input/output memory map unit and northbridge
#29 | 2015-04-16Leveraging a peripheral device to execute a machine instruction
#30 | 2012-09-27Input Output Memory Management Unit (IOMMU) Two-Layer Addressing
#31 | 2012-06-21Generalized control registers
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