Inventor profile of:

Thomas Kern

City:

Munich

Country:

Germany

Published Applications:

33

Last publication date:

2015-10-15

Top Assignees for applications by Thomas Kern

The entities that hold a legal rights for patent applications filed by inventor Kern Thomas:

Recent patent applications by Kern Thomas

Thomas Kern from Munich, DE has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2015-10-15
US20150294700A1
Physics

Memory timing circuit

#2 | 2015-08-27
US20150243360A1
Physics

Method, apparatus and device for data processing for determining a predetermined state of a memory

#3 | 2015-08-27
US20150243333A1
Physics

Determining a state of a cell structure

#4 | 2015-07-30
US20150212877A1
Physics

Apparatus and method for improving data storage by data inversion

#5 | 2015-07-09
US20150194192A1
Physics

Sense amplifier of a memory cell

#6 | 2015-06-18
US20150170762A1
Physics

Word line address scan

#7 | 2015-06-18
US20150170717A1
Physics

Method, apparatus and device for data processing

#8 | 2015-06-04
US20150155777A1
Electricity

Charge pumps with improved latchup characteristics

#9 | 2015-04-30
US20150121016A1
Physics

Method, apparatus and device for data processing

#10 | 2015-02-19
US20150052387A1
Physics

Systems and methods utilizing a flexible read reference for a dynamic read window

#11 | 2015-02-05
US20150039976A1
Electricity

Efficient error correction of multi-bit errors

#12 | 2015-02-05
US20150039805A1
Physics

System and method to emulate an electrically erasable programmable read-only memory

#13 | 2014-06-19
US20140173386A1
Electricity

Circuitry and method for correcting 3-bit errors containing adjacent 2-bit error

#14 | 2014-05-01
US20140122967A1
Physics

Circuitry and method for multi-bit correction

#15 | 2014-03-13
US20140075272A1
Physics

Device and method for testing a circuit to be tested

#16 | 2014-03-06
US20140064011A1
Physics

System and method for providing voltage supply protection in a memory device

#17 | 2014-03-06
US20140063923A1
Physics

Mismatch error reduction method and system for STT MRAM

#18 | 2014-02-27
US20140056058A1
Physics

Differential sensing method and system for STT MRAM

#19 | 2014-02-20
US20140052896A1
Physics

System and method for emulating an EEPROM in a non-volatile memory device

#20 | 2013-12-26
US20130346834A1
Electricity

Apparatus and method for correcting at least one bit error within a coded bit sequence

#21 | 2013-12-05
US20130321045A1
Electricity

Charge pumps with improved latchup characteristics

#22 | 2013-11-14
US20130305119A1
Electricity

Method and device for correction of ternary stored binary data

#23 | 2013-08-15
US20130212452A1
Physics

Apparatus and method for comparing pairs of binary words

#24 | 2012-06-07
US20120144260A1
Electricity

Apparatus and method for detecting an error within a coded binary word

#25 | 2012-05-31
US20120133424A1
Electricity

Charge pumps with improved latchup characteristics

#26 | 2012-05-24
US20120126783A1
Physics

Self timed current integrating scheme employing level and slope detection

#27 | 2012-05-10
US20120117448A1
Electricity

Apparatus and method for correcting at least one bit error within a coded bit sequence

#28 | 2012-03-22
US20120069673A1
Physics

Method and device for programming data into non-volatile memories

#29 | 2011-08-04
US20110191658A1
Electricity

Method and apparatus for storing data

#30 | 2010-10-21
US20100265783A1
Physics

Self-timed integrating differential current

#31 | 2007-04-19
US20070086241A1
Physics

Evaluation circuit and evaluation method for the assessment of memory cell states

#32 | 2007-04-19
US20070086240A1
Physics

Measuring circuit and reading method for memory cells

#33 | 2007-03-22
US20070064499A1
Physics

Semiconductor memory device and method for writing data into the semiconductor memory device

InventorID:

1147402 ⎘