Inventor profile of:

Jeffrey L. Libbert

City:

O'Fallon, Missouri

Country:

United States

Published Applications:

63

Last publication date:

2026-01-15

Top Assignees for applications by Jeffrey L. Libbert

The entities that hold a legal rights for patent applications filed by inventor Libbert Jeffrey L.:

Recent patent applications by Libbert Jeffrey L.

Jeffrey L. Libbert from O'Fallon, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2026-01-15
US20260018457A1
Electricity

METHODS OF PROCESSING SEMICONDUCTOR-ON-INSULATOR STRUCTURES USING CLEAN-AND-ETCH OPERATION

#2 | 2026-01-15
US20260015728A1
Chemistry; metallurgy

SYSTEMS AND METHODS FOR REACTOR APPARATUS CONTROL DURING SEMICONDUCTOR WAFER PROCESSES

#3 | 2026-01-01
US20260005066A1
Electricity

METHODS FOR CONTROLLING FLATNESS OF HANDLE STRUCTURES FOR USE IN SEMICONDUCTOR-ON-INSULATOR STRUCTURES

#4 | 2025-09-18
US20250293073A1
Electricity

RECLAIMABLE DONOR SUBSTRATES FOR USE IN PREPARING MULTIPLE SILICON-ON-INSULATOR STRUCTURES

#5 | 2025-08-14
US20250259884A1
Electricity

HIGH RESISTIVITY SILICON-ON-INSULATOR SUBSTRATE COMPRISING AN ISOLATION REGION

#6 | 2025-02-27
US20250069945A1
Electricity

METHODS OF PREPARING SILICON-ON-INSULATOR STRUCTURES USING EPITAXIAL WAFERS

#7 | 2024-08-01
US20240258155A1
Electricity

METHODS OF MANUFACTURING SEMICONDUCTOR-ON-INSULATOR WAFERS HAVING CHARGE TRAPPING LAYERS WITH CONTROLLED STRESS

#8 | 2023-07-06
US20230215759A1
Electricity

Radio frequency silicon on insulator structure with superior performance, stability, and manufacturability

#9 | 2023-05-25
US20230163022A1
Electricity

High resistivity silicon-on-insulator substrate comprising an isolation region

#10 | 2023-03-02
US20230062816A1
Electricity

Radio frequency silicon on insulator wafer platform with superior performance, stability, and manufacturability

#11 | 2021-12-09
US20210384070A1
Electricity

High resistivity semiconductor-on-insulator wafer and a method of manufacture

#12 | 2021-08-05
US20210242075A1
Electricity

Radio frequency silicon on insulator structure with superior performance, stability, and manufacturability

#13 | 2021-05-27
US20210159114A1
Electricity

Radio frequency silicon on insulator wafer platform with superior performance, stability, and manufacturability

#14 | 2021-02-04
US20210035855A1
Electricity

Method of preparing an isolation region in a high resistivity silicon-on-insulator substrate

#15 | 2021-01-14
US20210013093A1
Electricity

High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency

#16 | 2021-01-14
US20210013091A1
Electricity

Method of preparing an isolation region in a high resistivity silicon-on-insulator substrate

#17 | 2020-10-22
US20200335389A1
Electricity

High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency

#18 | 2020-04-23
US20200126848A1
Electricity

Method of depositing charge trapping polycrystalline silicon films on silicon substrates with controllable film stress

#19 | 2020-04-23
US20200126847A1
Electricity

High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency

#20 | 2020-02-20
US20200058566A1
Electricity

Methods for assessing semiconductor structures

#21 | 2020-01-30
US20200035544A1
Electricity

Method of manufacture of a semiconductor on insulator structure

#22 | 2020-01-16
US20200020766A1
Electricity

Radio frequency silicon on insulator wafer platform with superior performance, stability, and manufacturability

#23 | 2020-01-16
US20200020571A1
Electricity

Radio frequency silicon on insulator structure with superior performance, stability, and manufacturability

#24 | 2019-07-11
US20190214294A1
Electricity

Method of preparing an isolation region in a high resistivity silicon-on-insulator substrate

#25 | 2019-05-09
US20190139818A1
Electricity

High resistivity semiconductor-on-insulator wafer and a method of manufacturing

#26 | 2019-03-28
US20190096745A1
Electricity

Method of depositing charge trapping polycrystalline silicon films on silicon substrates with controllable film stress

#27 | 2019-01-24
US20190027397A1
Electricity

High resistivity silicon-on-insulator substrate comprising a charge trapping layer formed on a substrate with a rough surface

#28 | 2019-01-17
US20190019721A1
Electricity

Method of manufacture of a semiconductor on insulator structure

#29 | 2018-09-27
US20180277421A1
Electricity

Method of manufacturing high resistivity semiconductor-on-insulator wafers with charge trapping layers

#30 | 2018-08-16
US20180233420A1
Electricity

Methods for assessing semiconductor structures

#31 | 2018-08-16
US20180233400A1
Electricity

Method of depositing charge trapping polycrystalline silicon films on silicon substrates with controllable film stress

#32 | 2018-06-21
US20180174892A1
Electricity

High resistivity silicon-on-insulator substrate comprising an isolation region

#33 | 2018-04-26
US20180114720A1
Electricity

High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency

#34 | 2017-12-28
US20170372946A1
Electricity

High resistivity silicon-on-insulator substrate comprising an isolation region

#35 | 2017-11-23
US20170338143A1
Electricity

Method of manufacturing high resistivity semiconductor-on-insulator wafers with charge trapping layers

#36 | 2017-11-02
US20170316968A1
Electricity

High resistivity semiconductor-on-insulator wafer and a method of manufacturing

#37 | 2017-08-24
US20170243781A1
Electricity

Process flow for manufacturing semiconductor on insulator structures in parallel

#38 | 2017-01-26
US20170025306A1
Electricity

METHODS FOR PREPARING LAYERED SEMICONDUCTOR STRUCTURES AND RELATED BONDED STRUCTURES

#39 | 2015-12-31
US20150375495A1
Performing operations; transporting

Clamping apparatus for cleaving a bonded wafer structure and methods for cleaving

#40 | 2015-04-16
US20150104926A1
Electricity

Method of manufacturing high resistivity SOI substrate with reduced interface conductivity

#41 | 2014-11-06
US20140327112A1
Electricity

Method to delineate crystal related defects

#42 | 2014-09-18
US20140273405A1
Electricity

Semiconductor-on-insulator wafer manufacturing method for reducing light point defects and surface roughness

#43 | 2014-07-03
US20140187020A1
Electricity

Method for low temperature layer transfer in the preparation of multilayer semiconductor devices

#44 | 2013-09-12
US20130237032A1
Electricity

Method of manufacturing silicon-on-insulator wafers

#45 | 2013-05-30
US20130137241A1
Electricity

METHOD FOR THE PREPARATION OF A MULTI-LAYERED CRYSTALLINE STRUCTURE

#46 | 2013-05-02
US20130105539A1
Performing operations; transporting

Clamping apparatus for cleaving a bonded wafer structure

#47 | 2013-05-02
US20130105538A1
Performing operations; transporting

Methods for cleaving a bonded wafer structure

#48 | 2013-03-14
US20130062020A1
Electricity

Systems and methods for cleaving a bonded wafer pair

#49 | 2012-09-20
US20120238070A1
Electricity

Methods for producing silicon on insulator structures having high resistivity regions in the handle wafer

#50 | 2012-09-20
US20120235283A1
Electricity

SILICON ON INSULATOR STRUCTURES HAVING HIGH RESISTIVITY REGIONS IN THE HANDLE WAFER

#51 | 2012-05-10
US20120115258A1
Electricity

Methods for monitoring the amount of metal contamination in a process

#52 | 2011-09-01
US20110212550A1
Electricity

METHODS FOR DETECTING METAL PRECIPITATES IN A SEMICONDUCTOR WAFER

#53 | 2011-09-01
US20110212547A1
Electricity

METHODS FOR MONITORING THE AMOUNT OF METAL CONTAMINATION IMPARTED INTO WAFERS DURING A SEMICONDUCTOR PROCESS

#54 | 2011-06-30
US20110159665A1
Electricity

Method for the preparation of a multi-layered crystalline structure

#55 | 2011-06-23
US20110151592A1
Electricity

Methods for monitoring the amount of contamination imparted into semiconductor wafers during wafer processing

#56 | 2010-05-27
US20100130021A1
Electricity

METHOD FOR PROCESSING A SILICON-ON-INSULATOR STRUCTURE

#57 | 2005-11-17
US20050255671A1
Electricity

Process for producing silicon on insulator structure having intrinsic gettering by ion implantation

#58 | 2005-08-16
US10177444
-

Silicon on insulator structure having an epitaxial layer and intrinsic gettering

#59 | 2005-07-21
US20050158969A1
Electricity

Method for controlling of thermal donor formation in high resistivity CZ silicon

#60 | 2005-07-14
US20050150445A1
Chemistry; metallurgy

Low defect density silicon having a vacancy-dominated core substantially free of oxidation induced stacking faults

#61 | 2005-05-24
US10120714
-

Control of oxygen precipitate formation in high resistivity CZ silicon

#62 | 2005-03-03
US20050048247A1
Electricity

Process for making silicon wafers with stabilized oxygen precipitate nucleation centers

#63 | 2005-01-25
US10054629
-

Low defect density silicon having a vacancy-dominated core substantially free of oxidation induced stacking faults

InventorID:

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