O'Fallon, Missouri
United States
63
2026-01-15
The entities that hold a legal rights for patent applications filed by inventor Libbert Jeffrey L.:
Jeffrey L. Libbert from O'Fallon, US has applied for patents for these inventions. The list has both pending applications and granted patents:
METHODS OF PROCESSING SEMICONDUCTOR-ON-INSULATOR STRUCTURES USING CLEAN-AND-ETCH OPERATION
#2 | 2026-01-15SYSTEMS AND METHODS FOR REACTOR APPARATUS CONTROL DURING SEMICONDUCTOR WAFER PROCESSES
#3 | 2026-01-01METHODS FOR CONTROLLING FLATNESS OF HANDLE STRUCTURES FOR USE IN SEMICONDUCTOR-ON-INSULATOR STRUCTURES
#4 | 2025-09-18RECLAIMABLE DONOR SUBSTRATES FOR USE IN PREPARING MULTIPLE SILICON-ON-INSULATOR STRUCTURES
#5 | 2025-08-14HIGH RESISTIVITY SILICON-ON-INSULATOR SUBSTRATE COMPRISING AN ISOLATION REGION
#6 | 2025-02-27METHODS OF PREPARING SILICON-ON-INSULATOR STRUCTURES USING EPITAXIAL WAFERS
#7 | 2024-08-01METHODS OF MANUFACTURING SEMICONDUCTOR-ON-INSULATOR WAFERS HAVING CHARGE TRAPPING LAYERS WITH CONTROLLED STRESS
#8 | 2023-07-06Radio frequency silicon on insulator structure with superior performance, stability, and manufacturability
#9 | 2023-05-25High resistivity silicon-on-insulator substrate comprising an isolation region
#10 | 2023-03-02Radio frequency silicon on insulator wafer platform with superior performance, stability, and manufacturability
#11 | 2021-12-09High resistivity semiconductor-on-insulator wafer and a method of manufacture
#12 | 2021-08-05Radio frequency silicon on insulator structure with superior performance, stability, and manufacturability
#13 | 2021-05-27Radio frequency silicon on insulator wafer platform with superior performance, stability, and manufacturability
#14 | 2021-02-04Method of preparing an isolation region in a high resistivity silicon-on-insulator substrate
#15 | 2021-01-14High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency
#16 | 2021-01-14Method of preparing an isolation region in a high resistivity silicon-on-insulator substrate
#17 | 2020-10-22High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency
#18 | 2020-04-23Method of depositing charge trapping polycrystalline silicon films on silicon substrates with controllable film stress
#19 | 2020-04-23High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency
#20 | 2020-02-20Methods for assessing semiconductor structures
#21 | 2020-01-30Method of manufacture of a semiconductor on insulator structure
#22 | 2020-01-16Radio frequency silicon on insulator wafer platform with superior performance, stability, and manufacturability
#23 | 2020-01-16Radio frequency silicon on insulator structure with superior performance, stability, and manufacturability
#24 | 2019-07-11Method of preparing an isolation region in a high resistivity silicon-on-insulator substrate
#25 | 2019-05-09High resistivity semiconductor-on-insulator wafer and a method of manufacturing
#26 | 2019-03-28Method of depositing charge trapping polycrystalline silicon films on silicon substrates with controllable film stress
#27 | 2019-01-24High resistivity silicon-on-insulator substrate comprising a charge trapping layer formed on a substrate with a rough surface
#28 | 2019-01-17Method of manufacture of a semiconductor on insulator structure
#29 | 2018-09-27Method of manufacturing high resistivity semiconductor-on-insulator wafers with charge trapping layers
#30 | 2018-08-16Methods for assessing semiconductor structures
#31 | 2018-08-16Method of depositing charge trapping polycrystalline silicon films on silicon substrates with controllable film stress
#32 | 2018-06-21High resistivity silicon-on-insulator substrate comprising an isolation region
#33 | 2018-04-26High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency
#34 | 2017-12-28High resistivity silicon-on-insulator substrate comprising an isolation region
#35 | 2017-11-23Method of manufacturing high resistivity semiconductor-on-insulator wafers with charge trapping layers
#36 | 2017-11-02High resistivity semiconductor-on-insulator wafer and a method of manufacturing
#37 | 2017-08-24Process flow for manufacturing semiconductor on insulator structures in parallel
#38 | 2017-01-26METHODS FOR PREPARING LAYERED SEMICONDUCTOR STRUCTURES AND RELATED BONDED STRUCTURES
#39 | 2015-12-31Clamping apparatus for cleaving a bonded wafer structure and methods for cleaving
#40 | 2015-04-16Method of manufacturing high resistivity SOI substrate with reduced interface conductivity
#41 | 2014-11-06Method to delineate crystal related defects
#42 | 2014-09-18Semiconductor-on-insulator wafer manufacturing method for reducing light point defects and surface roughness
#43 | 2014-07-03Method for low temperature layer transfer in the preparation of multilayer semiconductor devices
#44 | 2013-09-12Method of manufacturing silicon-on-insulator wafers
#45 | 2013-05-30METHOD FOR THE PREPARATION OF A MULTI-LAYERED CRYSTALLINE STRUCTURE
#46 | 2013-05-02Clamping apparatus for cleaving a bonded wafer structure
#47 | 2013-05-02Methods for cleaving a bonded wafer structure
#48 | 2013-03-14Systems and methods for cleaving a bonded wafer pair
#49 | 2012-09-20Methods for producing silicon on insulator structures having high resistivity regions in the handle wafer
#50 | 2012-09-20SILICON ON INSULATOR STRUCTURES HAVING HIGH RESISTIVITY REGIONS IN THE HANDLE WAFER
#51 | 2012-05-10Methods for monitoring the amount of metal contamination in a process
#52 | 2011-09-01METHODS FOR DETECTING METAL PRECIPITATES IN A SEMICONDUCTOR WAFER
#53 | 2011-09-01METHODS FOR MONITORING THE AMOUNT OF METAL CONTAMINATION IMPARTED INTO WAFERS DURING A SEMICONDUCTOR PROCESS
#54 | 2011-06-30Method for the preparation of a multi-layered crystalline structure
#55 | 2011-06-23Methods for monitoring the amount of contamination imparted into semiconductor wafers during wafer processing
#56 | 2010-05-27METHOD FOR PROCESSING A SILICON-ON-INSULATOR STRUCTURE
#57 | 2005-11-17Process for producing silicon on insulator structure having intrinsic gettering by ion implantation
#58 | 2005-08-16Silicon on insulator structure having an epitaxial layer and intrinsic gettering
#59 | 2005-07-21Method for controlling of thermal donor formation in high resistivity CZ silicon
#60 | 2005-07-14Low defect density silicon having a vacancy-dominated core substantially free of oxidation induced stacking faults
#61 | 2005-05-24Control of oxygen precipitate formation in high resistivity CZ silicon
#62 | 2005-03-03Process for making silicon wafers with stabilized oxygen precipitate nucleation centers
#63 | 2005-01-25Low defect density silicon having a vacancy-dominated core substantially free of oxidation induced stacking faults
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