Mohammad Hekmat

SEMICONDUCTOR MEMORY SYSTEMS WITH ON-DIE DATA BUFFERING

Semiconductor memory systems with on-die data buffering

Semiconductor memory systems with on-die data buffering

Semiconductor memory systems with on-die data buffering

Integrated circuit comprising fractional clock multiplication circuitry

Integrated circuit comprising fractional clock multiplication circuitry

Digital calibration for multiphase oscillators

Calibration technique for a tap value in decision feedback equalizers

Fractional PLL using a linear PFD with adjustable delay

Shared multipoint reverse link for bidirectional communication in displays

Semiconductor memory systems with on-die data buffering

Electronic circuits using coupled multi-inductors

Integrated circuit comprising fractional clock multiplication circuitry

Digital calibration for multiphase oscillators

Data buffer with strobe-based primary interface and a strobe-less secondary interface

CML quarter-rate predictive feedback equalizer architecture

Semiconductor memory systems with on-die data buffering

Body-biased slicer design for predictive decision feedback equalizers

Apparatus and method for offset cancellation in duty cycle corrections

Integrated circuit comprising fractional clock multiplication circuitry

PVT tolerant differential circuit

Stacked comparator topology for multi-level signaling

Mismatched differential circuit

Electronic circuits using coupled multi-inductors

Semiconductor memory systems with on-die data buffering

Data buffer with a strobe-based primary interface and a strobe-less secondary interface

Digital calibration for multiphase oscillators

Integrated circuit comprising fractional clock multiplication circuitry

Methods and Circuits for Duty-Cycle Correction