Franklin, Massachusetts
United States
60
2026-06-18
The entities that hold a legal rights for patent applications filed by inventor Hummel Mark:
Mark Hummel from Franklin, US has applied for patents for these inventions. The list has both pending applications and granted patents:
LOCAL PORT GROUPING WITH RAILS OF NETWORK LINKS
#2 | 2026-05-07REUSEABLE VIRTUAL NETWORK ADDRESSES
#3 | 2026-04-02NETWORK MULTICASTING USING ALTERNATE SETS OF DIRECTIVES
#4 | 2026-03-26SELF-SYNCHRONIZING REMOTE MEMORY OPERATIONS IN A DATA CENTER OR MULTIPROCESSOR SYSTEM
#5 | 2025-10-16MEMORY POOLS IN A MEMORY MODEL FOR A UNIFIED COMPUTING SYSTEM
#6 | 2025-09-04Peripheral Device with Relaxed-Order Bus Interface
#7 | 2025-08-28MULTICAST AND REFLECTIVE MEMORY BEHAVIOR FOR MEMORY MODEL CONSISTENCY
#8 | 2025-04-24DATA PLANE SEPARATION IN NETWORKS TO REUSE VIRTUAL NETWORK ADDRESSES
#9 | 2025-03-06DATA PACKETS WITH MEMORY ACCESS PROTOCOLS IN HIGH-SPEED PACKET NETWORKS
#10 | 2024-12-05NATIVE LINK ENCRYPTION
#11 | 2024-11-28SELF-SYNCHRONIZING REMOTE MEMORY OPERATIONS IN A MULTIPROCESSOR SYSTEM
#12 | 2024-10-24SELF-SYNCHRONIZING REMOTE MEMORY OPERATIONS IN A DATA CENTER OR MULTIPROCESSOR SYSTEM
#13 | 2024-08-29EFFICIENT USE OF HASH BITS FOR FULL NETWORK FORWARDING SCHEME
#14 | 2024-08-01LOCAL PORT GROUPING WITH RAILS OF NETWORK LINKS
#15 | 2024-04-25MULTICAST-REDUCTION ASSISTED BY NETWORK DEVICES
#16 | 2024-03-21Multicast-reduction assisted by network devices
#17 | 2024-02-29Self-synchronizing remote memory operations in a multiprocessor system
#18 | 2024-01-02Path attestation for computing resources
#19 | 2023-12-14MEMORY POOLS IN A MEMORY MODEL FOR A UNIFIED COMPUTING SYSTEM
#20 | 2023-07-20MULTICAST AND REFLECTIVE MEMORY BEHAVIOR FOR MEMORY MODEL CONSISTENCY
#21 | 2023-07-20EFFICIENT MULTI-DEVICE SYNCHRONIZATION BARRIERS USING MULTICASTING
#22 | 2023-07-13NETWORK MULTICASTING USING ALTERNATE SETS OF DIRECTIVES
#23 | 2022-02-10Techniques for an efficient fabric attached memory
#24 | 2021-12-30Memory pools in a memory model for a unified computing system
#25 | 2021-05-06Techniques for an efficient fabric attached memory
#26 | 2019-10-03Memory pools in a memory model for a unified computing system
#27 | 2019-09-26Techniques for efficiently synchronizing data transmissions on a network
#28 | 2018-01-11Memory heaps in a memory model for a unified computing system
#29 | 2016-12-22MEMORY HEAPS IN A MEMORY MODEL FOR A UNIFIED COMPUTING SYSTEM
#30 | 2016-12-15Managing coherent memory between an accelerated processing device and a central processing unit
#31 | 2015-12-17Memory heaps in a memory model for a unified computing system
#32 | 2014-05-15Data flow processing in a network environment
#33 | 2014-03-06Systems and methods for managing queues
#34 | 2014-03-06SYSTEMS AND METHODS FOR PROCESSING MEDIA ACCESS CONTROL (MAC) ADDRESSES
#35 | 2014-02-27Systems and methods for sharing devices in a virtualization environment
#36 | 2014-02-20Speculation based approach for reliable message communications
#37 | 2013-12-26Systems and methods for input/output virtualization
#38 | 2013-12-19Devices and methods for interconnecting server nodes
#39 | 2013-11-14Server node interconnect devices and methods
#40 | 2013-10-03Visibility ordering in a memory model for a unified computing system
#41 | 2013-10-03Mapping Memory Instructions into a Shared Memory Address Place
#42 | 2013-10-03Memory heaps in a memory model for a unified computing system
#43 | 2013-10-03Managing coherent memory between an accelerated processing device and a central processing unit
#44 | 2013-10-03Cache management for memory operations
#45 | 2013-10-03MEMORY TYPES FOR CACHING POLICIES
#46 | 2013-06-27Sub page and page memory management apparatus and method
#47 | 2013-06-13Methods and systems to facilitate operation in unpinned memory
#48 | 2013-06-06Peripheral Memory Management
#49 | 2013-06-06Direct Device Assignment
#50 | 2013-05-30Efficient memory and resource management
#51 | 2013-03-21Method and apparatus for controlling state information retention in an apparatus
#52 | 2012-09-27Input Output Memory Management Unit (IOMMU) Two-Layer Addressing
#53 | 2012-09-13ACCESSIBILITY OF GRAPHICS PROCESSING COMPUTE RESOURCES
#54 | 2012-07-26Graphics processing dispatch from user mode
#55 | 2012-06-21Generalized control registers
#56 | 2012-06-14Graphics compute process scheduling
#57 | 2011-08-18IOMMU architected TLB support
#58 | 2011-03-10Systems and methods for processing memory requests in a multi-processor system using a probe engine
#59 | 2011-03-10Reading a local memory of a processing unit
#60 | 2009-09-29Error detection in a communication link
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