Fremont, California
United States
30
2016-02-04
The entities that hold a legal rights for patent applications filed by inventor HUI Angela:
Angela HUI from Fremont, US has applied for patents for these inventions. The list has both pending applications and granted patents:
Split-gate semiconductor device with L-shaped gate
#2 | 2014-06-19HTO offset for long leffective, better device performance
#3 | 2014-01-02SELF-ALIGNED SI RICH NITRIDE CHARGE TRAP LAYER ISOLATION FOR CHARGE TRAP FLASH MEMORY
#4 | 2013-03-28Etch stop layer for memory cell reliability improvement
#5 | 2012-11-27Etch stop layer for memory cell reliability improvement
#6 | 2012-07-19Methods for forming a memory cell having a top oxide spacer
#7 | 2012-01-10Flash memory device and method of forming the same with improved gate breakdown and endurance
#8 | 2011-11-17Oro and orpro with bit line trench to suppress transport program disturb
#9 | 2011-09-29Methods for forming a memory cell having a top oxide spacer
#10 | 2011-09-20Ultraviolet radiation blocking interlayer dielectric
#11 | 2010-10-21Use of a polymer spacer and Si trench in a bitline junction of a flash memory cell to improve TPD characteristics
#12 | 2010-09-16Self-aligned patterning method by using non-conformal film and etch for flash memory and other semiconductor applications
#13 | 2010-06-24HTO offset for long Leffective, better device performance
#14 | 2010-06-03Self-aligned SI rich nitride charge trap layer isolation for charge trap flash memory
#15 | 2010-04-22Selective silicide formation using resist etch back
#16 | 2010-04-13Methods for fabricating flash memory devices
#17 | 2009-11-24Selective contact formation using masking and resist patterning techniques
#18 | 2009-06-18SI trench between bitline HDP for BVDSS improvement
#19 | 2009-04-30Selective silicide formation using resist etchback
#20 | 2009-02-12Use of a polymer spacer and Si trench in a bitline junction of a flash memory cell to improve TPD characteristics
#21 | 2009-02-12ORO and ORPRO with bit line trench to suppress transport program disturb
#22 | 2008-10-30Self-aligned patterning method by using non-conformal film and etch back for flash memory and other semiconductor applications
#23 | 2008-04-24METHOD FOR MANUFACTURING A MEMORY DEVICE
#24 | 2008-03-13Dual storage node memory devices and methods for fabricating the same
#25 | 2006-06-27Flash memory device and method of forming the same with improved gate breakdown and endurance
#26 | 2005-12-13Method and system for forming dual gate structures in a nonvolatile memory using a protective layer
#27 | 2005-08-30Method for fabricating a memory device having reverse LDD
#28 | 2005-07-21Method of forming planarized shallow trench isolation
#29 | 2005-05-17Structure and method for preventing UV radiation damage in a memory cell and improving contact CD control
#30 | 2005-01-13Undoped oxide liner/BPSG for improved data retention
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