Dirk MANGER

LATERAL HIGH VOLTAGE SEMICONDUCTOR DEVICE AND METHOD FOR FORMING A LATERAL HIGH VOLTAGE SEMICONDUCTOR DEVICE

SEMICONDUCTOR DEVICE HAVING A TRENCH STRUCTURE WITH LOWER, UPPER, AND INTERMEDIARY SECTIONS AND METHOD OF PRODUCING THE SEMICONDUCTOR DEVICE

SEMICONDUCTOR DEVICE HAVING SILICON PLUGS FOR TRENCH AND/OR MESA SEGMENTATION

Method for forming vertical field effect transistor devices having alternating drift regions and compensation regions

Method for manufacturing a bipolar junction transistor

BiMOS device with a fully self-aligned emitter-silicon and method for manufacturing the same

Method for manufacturing a bipolar junction transistor

Vertical field effect transistor device having alternating drift regions and compensation regions

BiMOS device with a fully self-aligned emitter-silicon and method for manufacturing the same

Method for Manufacturing Contact Openings, Method for Manufacturing an Integrated Circuit, an Integrated Circuit

Integrated circuits having a contact region and methods for manufacturing the same

Methods of Manufacturing a Semiconductor Device

Method of fabricating a semiconductor device

Method for forming a structure on a substrate and device

Integrated circuits; methods for manufacturing an integrated circuit; memory modules; computing systems

Integrated circuit, cell, cell arrangement, method for manufacturing an integrated circuit, method for manufacturing a cell arrangement; memory module

DRAM memory cell

Integrated circuit including a gate electrode

Trench capacitor and corresponding method of production

Non-volatile memory array and method of fabricating the same

Vertical device with sidewall spacer, methods of forming sidewall spacers and field effect transistors, and patterning method

Hard Mask Layer Stack And A Method Of Patterning

Hard mask layer stack and a method of patterning

Field effect transistor and method of manufacturing the same

Memory cell array and memory cell

Trench storage capacitor

Memory cell array and method of manufacturing the same

Method for fabricating a capacitor

Method for forming a hard mask in a layer on a planar device

Integrated semiconductor memory with wordlines conductively connected to one another in pairs

Semiconductor substrate with trenches of varying depth

Semiconductor trench structure

Method for locally heating a region in a semiconductor substrate

DRAM cell array having vertical memory cells and methods for fabricating a DRAM cell array and a DRAM

DRAM cell array and memory cell arrangement having vertical memory cells and methods for fabricating the same

Line configuration for bit lines for contact-connecting at least one memory cell, semiconductor component with a line configuration and method for fabricating a line configuration

Method for producing a memory cell of a memory cell field in a semiconductor memory

FinFet device and method of fabrication

Architecture for vertical transistor cells and transistor-controlled memory cells