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Inventor profile of:

Peter D. Albrecht

City:

O'Fallon, Missouri

Country:

United States

Published Applications:

Last publication date:

2026-01-22

Top Assignees for applications by Peter D. Albrecht

The entities that hold a legal rights for patent applications filed by inventor Albrecht Peter D.:

MEMC Electronic Materials, Inc. 7 St. Peters, MO United States
GLOBALWAFERS CO., LTD. 7 Hsinchu, Taiwan
SUNEDISON, INC. 3 St. Peters, MO United States
SunEdison Semiconductor Limited (UEN201334164H) 2 St. Peters, MO United States
SunEdison, Inc. 1 St. Peters, MI United States
GlobalWafers Co., Ltd. 1 , Taiwan
GlobalWafers Co., Ltd. 1 Hsinchu, Taiwan, China
SUNEDISON SEMICONDUCTOR LIMITED (UEN201334164H) 1 Singapore, Singapore
MEMC ELECTRONIC MATERIALS, SPA 1 Novara, Italy

Recent patent applications by Albrecht Peter D.

Peter D. Albrecht from O'Fallon, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2026-01-22

US20260026320A1

Electricity

CLEAVING SYSTEMS AND METHODS FOR CLEAVING SEMICONDUCTOR STRUCTURES BY COMBINED THERMAL AND MECHANICAL STRESS INDUCTION

#2 | 2026-01-15

US20260018442A1

Electricity

WAFER BOATS AND METHODS FOR HEATING A SET OF SEMICONDUCTOR STRUCTURES

#3 | 2026-01-15

US20260018441A1

Electricity

SYSTEMS FOR TRANSPORTING A PLURALITY OF SEMICONDUCTOR STRUCTURES

#4 | 2026-01-15

US20260014669A1

Performing operations; transporting

POLISHING HEAD ASSEMBLIES FOR POLISHING SEMICONDUCTOR WAFERS

#5 | 2025-01-23

US20250026042A1

Performing operations; transporting

METHODS FOR CONTROLLING WAFER BREAKAGE DURING INGOT SLICING OPERATIONS

#6 | 2025-01-23

US20250025951A1

Performing operations; transporting

SYSTEMS AND METHODS FOR CONTROLLING WAFER BREAKAGE DURING INGOT SLICING OPERATIONS

#7 | 2023-12-07

US20230390962A1

Performing operations; transporting

SYSTEMS AND METHODS FOR CONTROLLING SURFACE PROFILES OF WAFERS SLICED IN A WIRE SAW

#8 | 2019-10-31

US20190333778A1

Electricity

Apparatus for stressing semiconductor substrates

#9 | 2019-10-10

US20190311913A1

Electricity

Apparatus for stressing semiconductor substrates

#10 | 2019-10-10

US20190311912A1

Electricity

Apparatus for stressing semiconductor substrates

#11 | 2019-09-26

US20190295853A1

Electricity

Apparatus for stressing semiconductor substrates

#12 | 2019-09-05

US20190270222A1

Performing operations; transporting

Methods and system for controlling a surface profile of a wafer

#13 | 2018-03-01

US20180056545A1

Performing operations; transporting

Methods and system for controlling a surface profile of a wafer

#14 | 2014-07-03

US20140187023A1

Electricity

Processes and apparatus for preparing heterostructures with reduced strain by radial compression

#15 | 2014-07-03

US20140187022A1

Electricity

Processes and apparatus for preparing heterostructures with reduced strain by radial distension

#16 | 2014-07-03

US20140182788A1

Electricity

Apparatus for stressing semiconductor substrates

#17 | 2014-06-19

US20140170781A1

Performing operations; transporting

Double side polisher with platen parallelism control

#18 | 2014-06-05

US20140150826A1

Electricity

WAFER CLEANING APPARATUS AND METHODS

#19 | 2013-05-16

US20130121802A1

Electricity

Wafer Transport Cart

#20 | 2013-04-11

US20130087132A1

Performing operations; transporting

Systems and methods for connecting an ingot to a wire saw

#21 | 2012-02-02

US20120028555A1

Performing operations; transporting

Grinding Tool For Trapezoid Grinding Of A Wafer

#22 | 2009-12-03

US20090298399A1

Performing operations; transporting

Semiconductor wafer polishing apparatus and method of polishing

#23 | 2009-10-01

US20090247055A1

Electricity

Methods for etching the edge of a silicon wafer

#24 | 2009-10-01

US20090246444A1

Electricity

Edge etched silicon wafers

#25 | 2009-10-01

US20090242126A1

Electricity

EDGE ETCHING APPARATUS FOR ETCHING THE EDGE OF A SILICON WAFER

#26 | 2006-11-21

US10432513

Semiconductor wafer, polishing apparatus and method

InventorID:

181820 ⎘