STEPHEN M. GATES

Microwave-to-optical quantum transducers

Layered substrate structures with aligned optical access to electrical devices

Selective and conformal passivation layer for 3D high-mobility channel devices

Lateral bipolar transistor

Low-loss large-grain optical waveguide for interconnecting components integrated on a glass substrate

Low resistance metal contacts to interconnects

Low resistance metal contacts to interconnects

Lateral bipolar transistor

Low-loss large-grain optical waveguide for interconnecting components integrated on a glass substrate

Lateral bipolar transistor

Advanced manganese/manganese nitride cap/etch mask for air gap formation scheme in nanocopper low-K interconnect

Air gap semiconductor structure with selective cap bilayer

Method of forming an air gap semiconductor structure with selective cap bilayer

Air gap semiconductor structure with selective cap bilayer

Vertically integrated active matrix backplane

Tunable interconnect structures, and integrated circuit containing the same

Interconnect wiring switches and integrated circuits including the same

BEOL structures incorporating active devices and mechanical strength

Beol structures incorporating active devices and mechanical strength

MATERIALS CONTAINING VOIDS WITH VOID SIZE CONTROLLED ON THE NANOMETER SCALE

Structure with sub-lithographic random conductors as a physical unclonable function

ELECTRONIC STRUCTURE CONTAINING A VIA ARRAY AS A PHYSICAL UNCLONABLE FUNCTION

Low cost anti-fuse structure and method to make same

Low cost anti-fuse structure

Reliable physical unclonable function for device authentication

Method for forming semiconductor chip with graphene based devices in an interconnect structure of the chip

DIELECTRIC MATERIAL WITH HIGH MECHANICAL STRENGTH

Multi component dielectric layer

Multiple step anneal method and semiconductor formed by multiple step anneal

Low k porous SiCOH dielectric and integration with post film formation treatment

Materials containing voids with void size controlled on the nanometer scale

ULTRA LOW DIELECTRIC CONSTANT MATERIAL WITH ENHANCED MECHANICAL PROPERTIES

BEOL structures incorporating active devices and mechanical strength

Wiring switch designs based on a field effect device for reconfigurable interconnect paths

Electrical fuse and method of making the same

Semiconductor chip with graphene based devices in an interconnect structure of the chip

Multi component dielectric layer

On-chip non-volatile storage of a test-time profile for efficiency and performance control

Non-volatile memory based reliability and availability mechanisms for a computing device

ULTRA LOW DIELECTRIC CONSTANT MATERIAL WITH ENHANCED MECHANICAL PROPERTIES

ENHANCED BONDING INTERFACES ON CARBON-BASED MATERIALS FOR NANOELECTRONIC DEVICES

SiCOH DIELECTRIC MATERIAL WITH IMPROVED TOUGHNESS AND IMPROVED Si-C BONDING, SEMICONDUCTOR DEVICE CONTAINING THE SAME, AND METHOD TO MAKE THE SAME

Pseudo hybrid structure for low K interconnect integration

METHOD FOR ENABLING HARD MASK FREE INTEGRATION OF ULTRA LOW-K MATERIALS AND STRUCTURES PRODUCED THEREBY

Materials containing voids with void size controlled on the nanometer scale

SiCOH film preparation using precursors with built-in porogen functionality

Method of fabricating a SiCOH dielectric material with improved toughness and improved Si-C bonding

LOW k POROUS SiCOH DIELECTRIC AND INTEGRATION WITH POST FILM FORMATION TREATMENT

LOW k POROUS SiCOH DIELECTRIC AND INTEGRATION WITH POST FILM FORMATION TREATMENT

Nonlithographic method to produce masks by selective reaction, articles produced, and composition for same

Electronic structures utilizing etch resistant boron and phosphorus materials and methods to form same

Nonlithographic method to produce self-aligned mask, articles produced by same and compositions for same

Selectively coated self-aligned mask

SiCOH DIELECTRIC

Structure and method for porous SiCOH dielectric layers and adhesion promoting or etch stop layers having increased interfacial and mechanical strength

BEOL interconnect structures with improved resistance to stress

Hardmask for improved reliability of silicon based dielectrics

HARDMASK FOR IMPROVED RELIABILITY OF SILICON BASED DIELECTRICS

METHOD AND STRUCTURE TO ENHANCE TEMPERATURE/HUMIDITY/BIAS PERFORMANCE OF SEMICONDUCTOR DEVICES BY SURFACE MODIFICATION

Multilayer hardmask scheme for damage-free dual damascene processing of SiCOH dielectrics

Methods to form SiCOH or SiCNH dielectrics and structures including the same

Electronic structures utilizing etch resistant boron and phosphorus materials and methods to form same

METHOD FOR ENABLING HARD MASK FREE INTEGRATION OF ULTRA LOW-K MATERIALS AND STRUCTURES PRODUCED THEREBY

Reliable BEOL integration process with direct CMP of porous SiCOH dielectric

Materials containing voids with void size controlled on the nanometer scale

SiCOH dielectric

SiCOH film preparation using precursors with built-in porogen functionality

Reliable BEOL integration process with direct CMP of porous SiCOH dielectric

SiCOH dielectric material with improved toughness and improved Si-C bonding, semiconductor device containing the same, and method to make the same

Method for fabricating an ultralow dielectric constant material as an intralevel or interlevel dielectric in a semiconductor device and electronic device made

Hardmask for reliability of silicon based dielectrics

Very low effective dielectric constant interconnect Structures and methods for fabricating the same

Low K and ultra low K SiCOH dielectric films and methods to form the same

Formation of arrays of microelectronic elements

Formation of low resistance via contacts in interconnect structures

Method for fabricating an ultralow dielectric constant material as an intralevel or interlevel dielectric in a semiconductor device and electronic device made

Nonlithographic method to produce self-aligned mask, articles produced by same and compositions for same

SiCOH dielectric material with improved toughness and improved Si-C bonding

Advanced BEOL interconnect structures with low-k PE CVD cap layer and method thereof

Very low effective dielectric constant interconnect structures and methods for fabricating the same

Structures and methods for integration of ultralow-k dielectrics with improved reliability

Low k and ultra low k SiCOH dielectric films and methods to form the same

Method of forming a magnetic-field sensor having magnetic nanoparticles

Reliable low-k interconnect structure with hybrid dielectric

Nonlithographic method to produce self-aligned mask, articles produced by same and compositions for same

Method and structure to enhance temperature/humidity/bias performance of semiconductor devices by surface modification

Magnetic-field sensor device

Formation of low resistance via contacts in interconnect structures

Reliable low-k interconnect structure with hybrid dielectric

Patterning layers comprised of spin-on ceramic films