Sunnyvale, California
United States
42
2026-03-05
The entities that hold a legal rights for patent applications filed by inventor Wright Kenneth L.:
Kenneth L. Wright from Sunnyvale, US has applied for patents for these inventions. The list has both pending applications and granted patents:
DYNAMIC RANDOM ACCESS MEMORY (DRAM) COMPONENT FOR HIGH-PERFORMANCE, HIGH-CAPACITY REGISTERED MEMORY MODULES
#2 | 2025-01-16INTERFACE FOR MEMORY READOUT FROM A MEMORY COMPONENT IN THE EVENT OF FAULT
#3 | 2024-09-26VARIABLE WIDTH MEMORY MODULE SUPPORTING ENHANCED ERROR DETECTION AND CORRECTION
#4 | 2024-08-01MEMORIES AND MEMORY COMPONENTS WITH INTERCONNECTED AND REDUNDANT DATA INTERFACES
#5 | 2024-05-16MEMORY SYSTEM WITH CACHED MEMORY MODULE OPERATIONS
#6 | 2024-03-28DYNAMIC RANDOM ACCESS MEMORY (DRAM) COMPONENT FOR HIGH-PERFORMANCE, HIGH-CAPACITY REGISTERED MEMORY MODULES
#7 | 2024-01-04Interface for memory readout from a memory component in the event of fault
#8 | 2024-01-02Memory component for deployment in a dynamic stripe width memory system
#9 | 2023-11-23Variable width memory module supporting enhanced error detection and correction
#10 | 2023-11-09Fault tolerant memory systems and components with interconnected and redundant data interfaces
#11 | 2022-12-22Hybrid memory module
#12 | 2022-11-03Dynamic random access memory (DRAM) component for high-performance, high-capacity registered memory modules
#13 | 2022-09-22Interface for memory readout from a memory component in the event of fault
#14 | 2022-06-02Memory system with cached memory module operations
#15 | 2022-05-12Memories and memory components with interconnected and redundant data interfaces
#16 | 2022-03-31Variable width memory module supporting enhanced error detection and correction
#17 | 2022-03-01Memory component for deployment in a dynamic stripe width memory system
#18 | 2022-01-06Memory component with efficient write operations
#19 | 2021-12-02Fault tolerant memory systems and components with interconnected and redundant data interfaces
#20 | 2021-06-10Variable width memory module supporting enhanced error detection and correction
#21 | 2021-06-10Dynamic random access memory (DRAM) component for high-performance, high-capacity registered memory modules
#22 | 2021-05-06Memory component with efficient write operations
#23 | 2021-04-22Hybrid memory module
#24 | 2020-11-19Memory system with cached memory module operations
#25 | 2020-10-08Variable width memory module supporting enhanced error detection and correction
#26 | 2020-08-04Controlling a dynamic-stripe-width memory module
#27 | 2020-02-13Interface for memory readout from a memory component in the event of fault
#28 | 2019-12-12Memories and memory components with interconnected and redundant data interfaces
#29 | 2019-11-28Variable width memory module supporting enhanced error detection and correction
#30 | 2019-09-26Fault tolerant memory systems and components with interconnected and redundant data interfaces
#31 | 2019-08-29Dynamic random access memory (DRAM) component for high-performance, high-capacity registered memory modules
#32 | 2019-08-22Hybrid memory module
#33 | 2019-05-30Memory component with efficient write operations
#34 | 2018-12-20Variable width memory module supporting enhanced error detection and correction
#35 | 2018-09-20Memory system with cached memory module operations
#36 | 2018-06-12Memory module with dynamic stripe width
#37 | 2018-02-22Memories and memory components with interconnected and redundant data interfaces
#38 | 2017-12-07Dynamic random access memory (DRAM) component for high-performance, high-capacity registered memory modules
#39 | 2017-11-16Memory module supporting time-division memory access
#40 | 2017-04-13Variable width memory module supporting enhanced error detection and correction
#41 | 2017-04-13Interface for memory readout from a memory component in the event of fault
#42 | 2017-03-30Fault tolerant memory systems and components with interconnected and redundant data interfaces
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