Livermore, California
United States
7
2019-11-21
The entities that hold a legal rights for patent applications filed by inventor Sinha Jaydeep K.:
Jaydeep K. Sinha from Livermore, US has applied for patents for these inventions. The list has both pending applications and granted patents:
Process-induced distortion prediction and feedforward and feedback correction of overlay errors
#2 | 2016-12-22Overlay and semiconductor process control using a wafer geometry metric
#3 | 2013-11-21Method and device for using substrate geometry to determine optimum substrate analysis sampling
#4 | 2013-11-14Systems and methods for wafer surface feature detection, classification and quantification with wafer geometry metrology tools
#5 | 2013-04-11Overlay and semiconductor process control using a wafer geometry metric
#6 | 2012-07-12Methods and systems of object based metrology for advanced wafer surface nanotopography
#7 | 2011-06-16Localized substrate geometry characterization
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