Austin, Texas
United States
36
2017-08-31
The entities that hold a legal rights for patent applications filed by inventor Majhi Prashant:
Prashant Majhi from Austin, US has applied for patents for these inventions. The list has both pending applications and granted patents:
TECHNIQUES FOR FILAMENT LOCALIZATION, EDGE EFFECT REDUCTION, AND FORMING/SWITCHING VOLTAGE REDUCTION IN RRAM DEVICES
#2 | 2016-12-29Thermal management structure for low-power nonvolatile filamentary switch
#3 | 2016-12-29Techniques for filament localization, edge effect reduction, and forming/switching voltage reduction in RRAM devices
#4 | 2016-12-22Quantum well MOSFET channels having lattice mismatch with metal source/drains, and conformal regrowth source/drains
#5 | 2015-08-25Tunneling transistor suitable for low voltage operation
#6 | 2014-05-29Method of forming layers using atomic layer deposition
#7 | 2013-12-05GATED CIRCUIT STRUCTURE WITH SELF-ALIGNED TUNNELING REGION
#8 | 2013-09-12Quantum well MOSFET channels having lattice mismatch with metal source/drains, and conformal regrowth source/drains
#9 | 2013-05-02Remote Doped High Performance Transistor Having Improved Subthreshold Characteristics
#10 | 2013-02-26Tunneling transistor suitable for low voltage operation
#11 | 2012-10-11DUAL METAL GATES USING ONE METAL TO ALTER WORK FUNCTION OF ANOTHER METAL
#12 | 2012-09-13Method of forming quantum well mosfet channels having uni-axial strains caused by metal source/drains
#13 | 2012-08-23Forming a non-planar transistor having a quantum well channel
#14 | 2011-06-30Semiconductor device and method of fabrication
#15 | 2011-06-30Forming a non-planar transistor having a quantum well channel
#16 | 2011-06-23Remote Doped High Performance Transistor Having Improved Subthreshold Characteristics
#17 | 2011-06-23Conductivity improvements for III-V semiconductor devices
#18 | 2011-05-26Quantum well MOSFET channels having uni-axial strain caused by metal source/drains, and conformal regrowth source/drains
#19 | 2010-12-23Interfacial barrier for work function modification of high performance CMOS devices
#20 | 2010-08-05Quantum well MOSFET channels having uni-axial strain caused by metal source/drains, and conformal regrowth source/drains
#21 | 2010-07-01Buffer structure for semiconductor device and methods of fabrication
#22 | 2010-07-01Quantum well MOSFET channels having uni-axial strain caused by metal source/drains, and conformal regrowth source/drains
#23 | 2010-02-18Self-aligned tunneling pocket in field-effect transistors and processes to form same
#24 | 2009-12-03Dual metal gates using one metal to alter work function of another metal
#25 | 2009-11-05Nanocrystal formation using atomic layer deposition and resulting apparatus
#26 | 2009-05-21REDUCING DEFECTS IN SEMICONDUCTOR QUANTUM WELL HETEROSTRUCTURES
#27 | 2009-02-12MOSFET WITH METAL GATE ELECTRODE
#28 | 2008-10-02Forming a non-planar transistor having a quantum well channel
#29 | 2008-10-02Forming a type I heterostructure in a group IV semiconductor
#30 | 2008-07-10NMOS transistors that mitigate fermi-level pinning by employing a hafnium-silicon gate electrode and high-k gate dieletric
#31 | 2008-07-03Dielectric barrier for nanocrystals
#32 | 2007-12-13Strain-inducing semiconductor regions
#33 | 2007-12-06Method and apparatus for determining the thickness of a dielectric layer
#34 | 2007-03-22Methods of modulating the work functions of film layers
#35 | 2006-10-19Transistors and methods of manufacture thereof
#36 | 2006-09-28Method and apparatus for determining the thickness of a dielectric layer
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