Mountain View, California
United States
30
2026-06-04
The entities that hold a legal rights for patent applications filed by inventor Foster John:
John Foster from Mountain View, US has applied for patents for these inventions. The list has both pending applications and granted patents:
USE OF TITANIUM NITRIDE AS AN ELECTRODE IN NON-FARADAIC ELECTROCHEMICAL CELL
#2 | 2022-09-15Small aperture large electrode cell
#3 | 2021-12-09USE OF TITANIUM NITRIDE AS AN ELECTRODE IN NON-FARADAIC ELECTROCHEMICAL CELL
#4 | 2021-05-06ELECTROCHEMICAL CELL WITH INCREASED CURRENT DENSITY
#5 | 2021-03-11Small aperture large electrode cell
#6 | 2021-02-11NANOPORE WELL STRUCTURES AND METHODS
#7 | 2019-05-30Use of titanium nitride as an electrode in non-faradaic electrochemical cell
#8 | 2018-10-18USE OF FLUOROPOLYMERS AS A HYDROPHOBIC LAYER TO SUPPORT LIPID BILAYER FORMATION FOR NANOPORE BASED DNA SEQUENCING
#9 | 2018-09-20Nanopore well structures and methods
#10 | 2017-07-27Use of titanium nitride as a counter electrode
#11 | 2017-03-02Small aperture large electrode cell
#12 | 2017-03-02Electrochemical cell with increased current density
#13 | 2017-02-09Use of titanium nitride as an electrode in non-faradaic electrochemical cell
#14 | 2016-06-23Particle removal with minimal etching of silicon-germanium
#15 | 2015-12-24Solution based etching of titanium carbide and titanium nitride structures
#16 | 2015-06-04Process for biosensor well formation
#17 | 2015-05-14Etching of semiconductor structures that include titanium-based layers
#18 | 2014-06-26High Productivity Combinatorial Techniques for Titanium Nitride Etching
#19 | 2014-06-26Selective Etching of Hafnium Oxide Using Non-Aqueous Solutions
#20 | 2014-02-27High productivity combinatorial workflow for post gate etch clean development
#21 | 2014-02-27Circular transmission line methods compatible with combinatorial processing of semiconductors
#22 | 2014-01-09Low temperature etching of silicon nitride structures using phosphoric acid solutions
#23 | 2013-12-10High productivity combinatorial workflow for post gate etch clean development
#24 | 2013-11-28High productivity combinatorial oxide terracing and PVD/ALD metal deposition combined with lithography for gate work function extraction
#25 | 2013-10-31Method for etching gate stack
#26 | 2013-10-10Process to remove Ni and Pt residues for NiPtSi application using chlorine gas
#27 | 2013-08-08Methods for PFET fabrication using APM solutions
#28 | 2013-05-16Process to remove Ni and Pt residues for NiPtSi applications
#29 | 2013-05-16Process to remove Ni and Pt residues for NiPtSi applications using chlorine gas
#30 | 2012-11-22Method for etching gate stack
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