Munich
Germany
105
2025-11-27
The entities that hold a legal rights for patent applications filed by inventor Hein Thomas:
Thomas Hein from Munich, DE has applied for patents for these inventions. The list has both pending applications and granted patents:
INTERLEAVED CODEWORD TRANSMISSION FOR A MEMORY DEVICE
#2 | 2025-05-15APPARATUSES INCLUDING BALL GRID ARRAYS AND ASSOCIATED SYSTEMS
#3 | 2025-01-30EFFICIENT ERROR SIGNALING BY MEMORY
#4 | 2025-01-09TECHNIQUES FOR DATA PATH ADDRESS PROTECTION
#5 | 2025-01-09TRANSMISSION FAILURE FEEDBACK SCHEMES FOR REDUCING CROSSTALK
#6 | 2025-01-09LEARNED TEMPERATURE COMPENSATION
#7 | 2024-11-07DATA INVERSION TECHNIQUES
#8 | 2024-08-29INTERLEAVED CODEWORD TRANSMISSION FOR A MEMORY DEVICE
#9 | 2024-08-22Apparatuses including ball grid arrays and associated systems
#10 | 2024-06-06COMMAND CLOCK STRUCTURE
#11 | 2024-05-30Dynamic control of error management and signaling
#12 | 2024-05-09VOLTAGE OVERSHOOT MITIGATION
#13 | 2024-04-18Channel modulation for a memory device
#14 | 2024-03-21Transmission failure feedback schemes for reducing crosstalk
#15 | 2024-01-25Bit and signal level mapping
#16 | 2024-01-25Efficient error signaling by memory
#17 | 2023-11-30Drive strength calibration for multi-level signaling
#18 | 2023-10-26Tracking a reference voltage after boot-up
#19 | 2023-10-10Error information signaling for memory
#20 | 2023-08-31Apparatuses including ball grid arrays and associated systems and methods
#21 | 2023-06-22DATA SCRAMBLING FOR REPEAT OPERATIONS
#22 | 2023-06-22LINK EVALUATION FOR A MEMORY DEVICE
#23 | 2023-06-22Signal path biasing in a memory system
#24 | 2023-06-15Data inversion techniques
#25 | 2023-02-23Masked training and analysis with a memory array
#26 | 2023-02-02Dynamic control of error management and signaling
#27 | 2023-01-19MULTI-VOLTAGE OPERATION FOR DRIVING A MULTI-MODE CHANNEL
#28 | 2022-12-08CONFIGURING COMMAND/ADDRESS CHANNEL FOR MEMORY
#29 | 2022-12-01Multi-level signaling for a memory device
#30 | 2022-11-24Drive strength calibration for multi-level signaling
#31 | 2022-11-17Interleaved codeword transmission for a memory device
#32 | 2022-11-03Masked training and analysis with a memory array
#33 | 2022-10-20Channel modulation for a memory device
#34 | 2022-08-04Bit and signal level mapping
#35 | 2022-06-30Temperature-based memory management
#36 | 2022-06-02Offset cancellation
#37 | 2022-06-02Controlled heating of a memory device
#38 | 2022-04-21Mode-dependent heating of a memory device
#39 | 2022-03-31Transmission failure feedback schemes for reducing crosstalk
#40 | 2022-03-17Signal sampling with offset calibration
#41 | 2022-02-24Multi-level receiver with termination-off mode
#42 | 2022-01-27Dynamically configuring transmission lines of a bus
#43 | 2022-01-13Dynamic control of error management and signaling
#44 | 2022-01-06Reporting control information errors
#45 | 2021-12-23Receive-side crosstalk cancelation
#46 | 2021-12-02Ball grid arrays and associated apparatuses and systems
#47 | 2021-10-14Drive strength calibration for multi-level signaling
#48 | 2021-10-14Training procedure for receivers associated with a memory device
#49 | 2021-07-29Postamble for multi-level signal modulation
#50 | 2021-07-22Data inversion techniques
#51 | 2021-07-22Bit and signal level mapping
#52 | 2021-07-15Techniques for low power operation
#53 | 2021-06-24Link evaluation for a memory device
#54 | 2021-06-17Memory health status reporting
#55 | 2021-06-17Interrupt signaling for a memory device
#56 | 2021-03-25Controlled heating of a memory device
#57 | 2021-03-18Pre-distortion for multi-level signaling
#58 | 2020-12-08Multiple memory die techniques
#59 | 2020-10-22Method and apparatus for signal path biasing in a memory system
#60 | 2020-10-22Multi-voltage operation for driving a multi-mode channel
#61 | 2020-09-17Receive-side crosstalk cancelation
#62 | 2020-07-23Channel modulation for a memory device
#63 | 2020-06-25Reporting control information errors
#64 | 2020-06-25Memory device low power mode
#65 | 2020-06-18Dynamic control of error management and signaling
#66 | 2020-06-11Multi-level signaling for a memory device
#67 | 2020-05-28Configuring command/address channel for memory
#68 | 2020-05-21Temperature-based memory management
#69 | 2020-04-23Mode-dependent heating of a memory device
#70 | 2020-04-23Multi-level receiver with termination-off mode
#71 | 2020-04-16Adapting channel current
#72 | 2020-04-16Offset cancellation
#73 | 2020-04-09Dynamically configuring transmission lines of a bus
#74 | 2020-02-27Pre-distortion for multi-level signaling
#75 | 2020-02-27Drive strength calibration for multi-level signaling
#76 | 2020-02-27Training procedure for receivers associated with a memory device
#77 | 2020-02-27Transmission failure feedback schemes for reducing crosstalk
#78 | 2014-07-31Data mask encoding in data bit inversion scheme
#79 | 2012-08-02Circuit
#80 | 2011-08-25Semiconductor memory with memory cell portions having different access speeds
#81 | 2011-03-17Phase shift adjusting method and circuit
#82 | 2009-10-29Interface voltage adjustment based on error detection
#83 | 2009-02-12Integrated Circuit Having a Plurality of Connection Pads and Integrated Circuit Package
#84 | 2008-10-23INTEGRATED CIRCUIT AND MEMORY DEVICE
#85 | 2008-09-18Circuit
#86 | 2008-08-07METHODS AND SYSTEMS FOR STORING DATA BASED ON A RELIABILITY REQUIREMENT
#87 | 2008-07-31Asynchronous data transmission
#88 | 2008-07-31OPTICAL MULTI MODE TRANSMISSION BETWEEN A PROCESSOR AND A SET OF MEMORIES
#89 | 2008-05-29Memory controller, memory circuit and memory system with a memory controller and a memory circuit
#90 | 2008-05-29Evaluation unit in an integrated circuit
#91 | 2008-05-15Information transmission and reception
#92 | 2008-05-15TRAINING OF SIGNAL TRANSFER CHANNELS BETWEEN MEMORY CONTROLLER AND MEMORY DEVICE
#93 | 2008-05-15Control signal training
#94 | 2008-04-03Electronic device, method for operating an electronic device, memory circuit and method of operating a memory circuit
#95 | 2008-04-03METHOD AND APPARATUS FOR REFRESHING MEMORY CELLS OF A MEMORY
#96 | 2008-03-27Phase shift adjusting method and circuit
#97 | 2008-03-13Method and apparatus for sending data from a memory
#98 | 2008-03-13Memory circuit, a dynamic random access memory, a system comprising a memory and a floating point unit and a method for storing digital data
#99 | 2008-03-06SYSTEM AND METHOD OF CONNECTING A PROCESSING UNIT WITH A MEMORY UNIT
#100 | 2008-03-06MEMORY WITH MEMORY BANKS AND MODE REGISTERS AND METHOD OF OPERATING A MEMORY
2656949 ⎘