Inventor profile of:

Bryan Black

City:

Spicewood, Texas

Country:

United States

Published Applications:

36

Last publication date:

2025-10-02

Top Assignees for applications by Bryan Black

The entities that hold a legal rights for patent applications filed by inventor Black Bryan:

Recent patent applications by Black Bryan

Bryan Black from Spicewood, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2025-10-02
US20250309082A1
Electricity

Through Package Vertical Interconnect and Method of Making Same

#2 | 2025-09-18
US20250293133A1
Electricity

Through Package Vertical Interconnect and Method of Making Same

#3 | 2024-10-10
US20240337799A1
Physics

Co-Packaging Assembly and Method for Attaching Photonic Dies/Modules to Multi-Chip Active/Passive Substrate

#4 | 2023-12-21
US20230411174A1
Electricity

Package Assembly and Method of Attaching Multi-Height Dies/Modules to Multi-Chip Active/Passive Substrate

#5 | 2023-12-07
US20230395305A1
Electricity

Inductors Embedded in Package Substrate and Board and Method and System for Manufacturing the Same

#6 | 2023-10-26
US20230343687A1
Electricity

Through Package Vertical Interconnect and Method of Making Same

#7 | 2023-02-02
US20230031099A1
Electricity

Semiconductor chip with redundant thru-silicon-vias

#8 | 2017-07-27
US20170213787A1
Electricity

Interposer with beyond reticle field conductor pads

#9 | 2017-03-30
US20170092616A1
Electricity

Semiconductor workpiece with selective backside metallization

#10 | 2016-12-15
US20160365335A1
Electricity

Semiconductor chip with redundant thru-silicon-vias

#11 | 2014-04-17
US20140103506A1
Electricity

Semiconductor chip device with polymeric filler trench

#12 | 2013-12-26
US20130342231A1
Physics

SEMICONDUCTOR SUBSTRATE WITH ONBOARD TEST STRUCTURE

#13 | 2013-12-26
US20130341783A1
Electricity

Interposer with identification system

#14 | 2013-10-03
US20130256913A1
Electricity

DIE STACKING WITH COUPLED ELECTRICAL INTERCONNECTS TO ALIGN PROXIMITY INTERCONNECTS

#15 | 2013-10-03
US20130256895A1
Electricity

STACKED SEMICONDUCTOR COMPONENTS WITH UNIVERSAL INTERCONNECT FOOTPRINT

#16 | 2013-10-03
US20130256872A1
Electricity

Thermal management of stacked semiconductor chips with electrically non-functional interconnects

#17 | 2013-06-27
US20130161814A1
Electricity

SEMICONDUCTOR CHIP WITH OFFSET PADS

#18 | 2013-06-20
US20130159818A1
Physics

Unified data masking, data poisoning, and data bus inversion signaling

#19 | 2013-06-20
US20130159587A1
Physics

Interconnect Redundancy for Multi-Interconnect Device

#20 | 2013-06-20
US20130159584A1
Physics

Data bus inversion coding

#21 | 2013-06-13
US20130147028A1
Electricity

HEAT SPREADER FOR MULTIPLE CHIP SYSTEMS

#22 | 2013-06-06
US20130141442A1
Physics

METHOD AND APPARATUS FOR MULTI-CHIP PROCESSING

#23 | 2012-08-16
US20120205791A1
Electricity

Semiconductor chip with reinforcing through-silicon-vias

#24 | 2012-04-26
US20120098119A1
Electricity

Semiconductor chip device with liquid thermal interface material

#25 | 2012-03-29
US20120075807A1
Electricity

Stacked semiconductor chip device with thermal management

#26 | 2012-03-29
US20120074579A1
Electricity

Semiconductor chip with reinforcing through-silicon-vias

#27 | 2012-03-15
US20120061853A1
Electricity

Semiconductor chip device with underfill

#28 | 2012-03-15
US20120061852A1
Electricity

Semiconductor chip device with polymeric filler trench

#29 | 2012-03-15
US20120061821A1
Electricity

Semiconductor chip with redundant thru-silicon-vias

#30 | 2012-02-23
US20120043669A1
Electricity

Stacked semiconductor chip device with thermal management circuit board

#31 | 2012-02-23
US20120043668A1
Electricity

Stacked semiconductor chips with thermal management

#32 | 2012-02-23
US20120043539A1
Electricity

Semiconductor chip with thermal interface tape

#33 | 2012-02-16
US20120038061A1
Electricity

Method of manufacturing and assembling semiconductor chips with offset pads

#34 | 2011-12-15
US20110304051A1
Electricity

Thermal interface material with support structure

#35 | 2011-03-10
US20110057677A1
Physics

Die stacking, testing and packaging for yield

#36 | 2010-09-23
US20100237496A1
Electricity

Thermal interface material with support structure

InventorID:

271664 ⎘