Franklin, Massachusetts
United States
41
2022-12-29
The entities that hold a legal rights for patent applications filed by inventor Hummel Mark D.:
Mark D. Hummel from Franklin, US has applied for patents for these inventions. The list has both pending applications and granted patents:
CROSSBAR MULTIPATHING FOR MULTICAST PERFORMANCE IN TILED SWITCHES
#2 | 2016-01-07Devices and methods for interconnecting server nodes
#3 | 2015-11-26Channel rotating error correction code
#4 | 2014-03-06Channel rotating error correction code
#5 | 2014-03-06HARDWARE BASED MEMORY ALLOCATION SYSTEM WITH DIRECTLY CONNECTED MEMORY
#6 | 2014-03-06DATA TRANSFER SYSTEM AND METHOD
#7 | 2014-03-06Virtual input/output memory management unit within a guest virtual machine
#8 | 2014-02-27Processing system using virtual network interface controller addressing as flow control metadata
#9 | 2014-02-06Shared memory space in a unified memory model
#10 | 2014-02-06All invalidate approach for memory management units
#11 | 2013-10-17Interrupt virtualization
#12 | 2013-07-04METHODS AND APPARATUS FOR IMPLEMENTING PCI EXPRESS LIGHTWEIGHT NOTIFICATION PROTOCOLS IN A CPU/MEMORY COMPLEX
#13 | 2013-07-04METHODS AND APPARATUS FOR INJECTING PCI EXPRESS TRAFFIC INTO HOST CACHE MEMORY USING A BIT MASK IN THE TRANSACTION LAYER STEERING TAG
#14 | 2013-06-20Method and apparatus for controlling system interrupts
#15 | 2013-04-04Vector width-aware synchronization-elision for vector processors
#16 | 2012-05-17COHERENCE DOMAIN SUPPORT FOR MULTI-TENANT ENVIRONMENT
#17 | 2012-01-19Mechanism to handle peripheral page faults
#18 | 2011-08-25ASSIGNING FLOATING-POINT OPERATIONS TO A FLOATING-POINT UNIT AND AN ARITHMETIC LOGIC UNIT
#19 | 2011-08-11Processor Configured to Virtualize Guest Local Interrupt Controller
#20 | 2011-08-11Interrupt virtualization
#21 | 2011-01-27I/O memory management unit including multilevel address translation for I/O and computation offload
#22 | 2011-01-27IOMMU using two-level address translation for I/O and computation offload devices on a peripheral interconnect
#23 | 2010-07-29Guest interrupt manager that records interrupts for guests and delivers interrupts to executing guests
#24 | 2010-05-13Using an IOMMU to create memory archetypes
#25 | 2010-04-15Direct memory access (DMA) address translation in an input/output memory management unit (IOMMU)
#26 | 2010-01-14Virtualizing an IOMMU
#27 | 2009-12-29Implementing locks in a distributed processing system
#28 | 2008-11-20Synchronization device and methods thereof
#29 | 2008-09-02System including a host connected to a plurality of memory modules via a serial memory interconnect
#30 | 2008-08-28Translation data prefetch in an IOMMU
#31 | 2008-05-15Filtering and remapping interrupts
#32 | 2008-05-15Efficiently controlling special memory mapped system accesses
#33 | 2007-07-19Input/output memory management unit that implements memory attributes based on translation data
#34 | 2007-07-19Address translation for input/output (I/O) devices and interrupt remapping for I/O devices in an I/O memory management unit (IOMMU)
#35 | 2007-07-19Virtualizing an IOMMU
#36 | 2007-07-19Chained hybrid input/output memory management unit
#37 | 2007-02-15Avoiding silent data corruption and data leakage in a virtual environment with multiple guests
#38 | 2007-02-15Controlling an I/O MMU
#39 | 2007-02-15Ensuring deadlock free operation for peer to peer traffic in an input/output memory management unit (IOMMU)
#40 | 2006-06-27System and method of maintaining coherency in a distributed communication system
#41 | 2005-09-27System and method for implementing a separate virtual channel for posted requests in a multiprocessor computer system
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