Austin, Texas
United States
23
2010-05-27
The entities that hold a legal rights for patent applications filed by inventor Schulz Thomas:
Thomas Schulz from Austin, US has applied for patents for these inventions. The list has both pending applications and granted patents:
Semiconductor Devices and Methods of Manufacture Thereof
#2 | 2009-07-23Integrated circuit arrangement with capacitor and fabrication method
#3 | 2009-05-07FinFET device with gate electrode and spacers
#4 | 2009-03-12Multiple-gate MOS transistors
#5 | 2008-09-04SOI field effect transistor and corresponding field effect transistor
#6 | 2008-02-14Integrated circuit arrangement with capacitor and fabrication method
#7 | 2008-02-14Fin Field-Effect Transistor and Method for Fabricating a Fin Field-Effect Transistor
#8 | 2007-09-04Fin Field-effect transistor and method for producing a fin field effect-transistor
#9 | 2007-05-17Methods of manufacturing multiple gate CMOS transistors having different gate dielectric materials
#10 | 2007-04-05Semiconductor devices and methods of manufacture thereof
#11 | 2007-03-08Transistors and methods of manufacture thereof
#12 | 2006-08-24Method of forming trench-gate electrode for FinFET device
#13 | 2006-07-20Gate electrode for FinFET device
#14 | 2006-06-15Vertically integrated field-effect transistor having a nanostructure therein
#15 | 2006-02-02Integrated circuit arrangement having capacitors and having planar transistors and fabrication method
#16 | 2006-01-19Non-volatile memory cell, memory cell arrangement and method for production of a non-volatile memory cell
#17 | 2006-01-05Integrated circuit arrangement with capacitor
#18 | 2005-12-15Memory cell, memory cell arrangement, patterning arrangement, and method for fabricating a memory cell
#19 | 2005-10-13Integrated circuit array
#20 | 2005-09-15Semiconductor memory with vertical memory transistors and method for fabricating it
#21 | 2005-09-15Word and bit line arrangement for a FinFET semiconductor memory
#22 | 2005-09-15Semiconductor memory with vertical memory transistors in a cell array arrangement with 1-2Fcells
#23 | 2005-05-19Method for producing an SOI field effect transistor
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